[RFC,v3,3/6] ARM/arm64: dts: enable wakeup for cros-ec-spi devices

Message ID 1498039313-24220-4-git-send-email-jeffy.chen@rock-chips.com
State New
Headers show

Commit Message

Jeffy Chen June 21, 2017, 10:01 a.m.
We used to enable wakeup for cros-ec-spi devices unconditionally.
Now we are using the more generic wakeup-source property to enable it.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---

Changes in v3: None

 arch/arm/boot/dts/exynos5420-peach-pit.dts      | 1 +
 arch/arm/boot/dts/exynos5800-peach-pi.dts       | 1 +
 arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 1 +
 arch/arm/boot/dts/tegra124-nyan.dtsi            | 1 +
 arch/arm/boot/dts/tegra124-venice2.dts          | 1 +
 arch/arm64/boot/dts/nvidia/tegra132-norrin.dts  | 1 +
 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi    | 1 +
 7 files changed, 7 insertions(+)

Comments

Krzysztof Kozlowski June 21, 2017, 10:45 a.m. | #1
On Wed, Jun 21, 2017 at 12:01 PM, Jeffy Chen <jeffy.chen@rock-chips.com> wrote:
> We used to enable wakeup for cros-ec-spi devices unconditionally.
> Now we are using the more generic wakeup-source property to enable it.

Using wakeup-source property is still enabling this unconditionally.
What  do you exactly mean here?

>
> Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
> ---
>
> Changes in v3: None
>
>  arch/arm/boot/dts/exynos5420-peach-pit.dts      | 1 +
>  arch/arm/boot/dts/exynos5800-peach-pi.dts       | 1 +
>  arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi | 1 +
>  arch/arm/boot/dts/tegra124-nyan.dtsi            | 1 +
>  arch/arm/boot/dts/tegra124-venice2.dts          | 1 +
>  arch/arm64/boot/dts/nvidia/tegra132-norrin.dts  | 1 +
>  arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi    | 1 +
>  7 files changed, 7 insertions(+)

Please split it per arch (arm and arm64) and per machine. I'll take
exynos after splitting.

Best regards,
Krzysztof
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Krzysztof Kozlowski June 21, 2017, 3:36 p.m. | #2
On Wed, Jun 21, 2017 at 11:33:29PM +0800, jeffy wrote:
> Hi Krzysztof,
> 
> thanx for your comment.
> 
> On 06/21/2017 06:45 PM, Krzysztof Kozlowski wrote:
> > On Wed, Jun 21, 2017 at 12:01 PM, Jeffy Chen <jeffy.chen@rock-chips.com> wrote:
> > > We used to enable wakeup for cros-ec-spi devices unconditionally.
> > > Now we are using the more generic wakeup-source property to enable it.
> > 
> > Using wakeup-source property is still enabling this unconditionally.
> > What  do you exactly mean here?
> i mean the wakeup-source is an optional property, we can disable wakeup by
> not adding it.

Maybe mention this in commit msg? This removes any confusion. "Till now
the driver always enabled wakeup but now it supports wakeup property so
add it to keep same functionality."

Best regards,
Krzysztof

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Jeffy Chen June 22, 2017, 2:33 a.m. | #3
Hi Krzysztof,

thanx for noting that, will add it to next version :)


On 06/21/2017 11:36 PM, Krzysztof Kozlowski wrote:
> On Wed, Jun 21, 2017 at 11:33:29PM +0800, jeffy wrote:
>> Hi Krzysztof,
>>
>> thanx for your comment.
>>
>> On 06/21/2017 06:45 PM, Krzysztof Kozlowski wrote:
>>> On Wed, Jun 21, 2017 at 12:01 PM, Jeffy Chen <jeffy.chen@rock-chips.com> wrote:
>>>> We used to enable wakeup for cros-ec-spi devices unconditionally.
>>>> Now we are using the more generic wakeup-source property to enable it.
>>>
>>> Using wakeup-source property is still enabling this unconditionally.
>>> What  do you exactly mean here?
>> i mean the wakeup-source is an optional property, we can disable wakeup by
>> not adding it.
>
> Maybe mention this in commit msg? This removes any confusion. "Till now
> the driver always enabled wakeup but now it supports wakeup property so
> add it to keep same functionality."
>
> Best regards,
> Krzysztof
>
>
>
>


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Patch

diff --git a/arch/arm/boot/dts/exynos5420-peach-pit.dts b/arch/arm/boot/dts/exynos5420-peach-pit.dts
index f9a75bf..a65ec2a 100644
--- a/arch/arm/boot/dts/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/exynos5420-peach-pit.dts
@@ -950,6 +950,7 @@ 
 		reg = <0>;
 		spi-max-frequency = <3125000>;
 		google,has-vbc-nvram;
+		wakeup-source;
 
 		controller-data {
 			samsung,spi-feedback-delay = <1>;
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index 953dc86..5209832 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -919,6 +919,7 @@ 
 		reg = <0>;
 		spi-max-frequency = <3125000>;
 		google,has-vbc-nvram;
+		wakeup-source;
 
 		controller-data {
 			samsung,spi-feedback-delay = <1>;
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index d752a31..94924df 100644
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -232,6 +232,7 @@ 
 		pinctrl-names = "default";
 		pinctrl-0 = <&ec_int>;
 		spi-max-frequency = <3000000>;
+		wakeup-source;
 
 		i2c_tunnel: i2c-tunnel {
 			compatible = "google,cros-ec-i2c-tunnel";
diff --git a/arch/arm/boot/dts/tegra124-nyan.dtsi b/arch/arm/boot/dts/tegra124-nyan.dtsi
index 5cf987b..198fc30 100644
--- a/arch/arm/boot/dts/tegra124-nyan.dtsi
+++ b/arch/arm/boot/dts/tegra124-nyan.dtsi
@@ -318,6 +318,7 @@ 
 			reg = <0>;
 
 			google,cros-ec-spi-msg-delay = <2000>;
+			wakeup-source;
 
 			i2c-tunnel {
 				compatible = "google,cros-ec-i2c-tunnel";
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts
index 6e59cec..008574d 100644
--- a/arch/arm/boot/dts/tegra124-venice2.dts
+++ b/arch/arm/boot/dts/tegra124-venice2.dts
@@ -845,6 +845,7 @@ 
 			reg = <0>;
 
 			google,cros-ec-spi-msg-delay = <2000>;
+			wakeup-source;
 
 			i2c-tunnel {
 				compatible = "google,cros-ec-i2c-tunnel";
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index 759af96..e0e54a9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -758,6 +758,7 @@ 
 			reg = <0>;
 
 			google,cros-ec-spi-msg-delay = <2000>;
+			wakeup-source;
 
 			i2c_20: i2c-tunnel {
 				compatible = "google,cros-ec-i2c-tunnel";
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index eb50593..409199b 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -798,6 +798,7 @@  ap_i2c_audio: &i2c8 {
 		pinctrl-names = "default";
 		pinctrl-0 = <&ec_ap_int_l>;
 		spi-max-frequency = <3000000>;
+		wakeup-source;
 
 		i2c_tunnel: i2c-tunnel {
 			compatible = "google,cros-ec-i2c-tunnel";