diff mbox

[v1,2/8] target-microblaze: Don't hard code 0xb as initial MB version

Message ID 1497973886-26257-3-git-send-email-edgar.iglesias@gmail.com
State New
Headers show

Commit Message

Edgar E. Iglesias June 20, 2017, 3:51 p.m. UTC 
From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>

Don't hard code 0xb as initial MB version.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
---
 target/microblaze/cpu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Alistair Francis June 20, 2017, 9:13 p.m. UTC | #1 
On Tue, Jun 20, 2017 at 8:51 AM, Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Don't hard code 0xb as initial MB version.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>

Thanks,
Alistair

> ---
>  target/microblaze/cpu.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
> index af70faa..4bc77df 100644
> --- a/target/microblaze/cpu.c
> +++ b/target/microblaze/cpu.c
> @@ -152,8 +152,7 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
>                         | PVR0_USE_HW_MUL_MASK \
>                         | PVR0_USE_EXC_MASK \
>                         | PVR0_USE_ICACHE_MASK \
> -                       | PVR0_USE_DCACHE_MASK \
> -                       | (0xb << 8);
> +                       | PVR0_USE_DCACHE_MASK;
>      env->pvr.regs[2] = PVR2_D_OPB_MASK \
>                          | PVR2_D_LMB_MASK \
>                          | PVR2_I_OPB_MASK \
> --
> 2.7.4
>
>
diff mbox

Patch

diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index af70faa..4bc77df 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -152,8 +152,7 @@  static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
                        | PVR0_USE_HW_MUL_MASK \
                        | PVR0_USE_EXC_MASK \
                        | PVR0_USE_ICACHE_MASK \
-                       | PVR0_USE_DCACHE_MASK \
-                       | (0xb << 8);
+                       | PVR0_USE_DCACHE_MASK;
     env->pvr.regs[2] = PVR2_D_OPB_MASK \
                         | PVR2_D_LMB_MASK \
                         | PVR2_I_OPB_MASK \