From patchwork Thu Jan 6 19:37:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 77799 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CC198B7137 for ; Fri, 7 Jan 2011 07:21:50 +1100 (EST) Received: from localhost ([127.0.0.1]:58051 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PawL9-0000j8-IZ for incoming@patchwork.ozlabs.org; Thu, 06 Jan 2011 15:21:43 -0500 Received: from [140.186.70.92] (port=54374 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PavjP-0007cG-FX for qemu-devel@nongnu.org; Thu, 06 Jan 2011 14:43:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Paven-0003U3-Oi for qemu-devel@nongnu.org; Thu, 06 Jan 2011 14:37:59 -0500 Received: from mnementh.archaic.org.uk ([81.2.115.146]:19304) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Paven-0003TQ-GL for qemu-devel@nongnu.org; Thu, 06 Jan 2011 14:37:57 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.69) (envelope-from ) id 1Pavel-0005NR-2x for qemu-devel@nongnu.org; Thu, 06 Jan 2011 19:37:55 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 6 Jan 2011 19:37:54 +0000 Message-Id: <1294342675-20643-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1294342675-20643-1-git-send-email-peter.maydell@linaro.org> References: <1294342675-20643-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Subject: [Qemu-devel] [PATCH v2 2/3] ARM: Set softfloat cumulative exc flags from correct FPSCR bits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org When handling a write to the ARM FPSCR, set the softfloat cumulative exception flags from the cumulative flags in the FPSCR, not the exception-enable bits. Also don't apply a mask: vfp_exceptbits_to_host will only look at the correct bits anyway. Signed-off-by: Peter Maydell --- target-arm/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 50c1017..05684a2 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2315,7 +2315,7 @@ void HELPER(vfp_set_fpscr)(CPUState *env, uint32_t val) if (changed & (1 << 25)) set_default_nan_mode((val & (1 << 25)) != 0, &env->vfp.fp_status); - i = vfp_exceptbits_to_host((val >> 8) & 0x1f); + i = vfp_exceptbits_to_host(val); set_float_exception_flags(i, &env->vfp.fp_status); }