From patchwork Thu Jan 6 17:25:12 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Ellcey X-Patchwork-Id: 77746 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 6F71CB708B for ; Fri, 7 Jan 2011 04:25:51 +1100 (EST) Received: (qmail 6430 invoked by alias); 6 Jan 2011 17:25:47 -0000 Received: (qmail 6255 invoked by uid 22791); 6 Jan 2011 17:25:45 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from g4t0016.houston.hp.com (HELO g4t0016.houston.hp.com) (15.201.24.19) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 06 Jan 2011 17:25:40 +0000 Received: from g4t0009.houston.hp.com (g4t0009.houston.hp.com [16.234.32.26]) by g4t0016.houston.hp.com (Postfix) with ESMTP id AF4BF1457C; Thu, 6 Jan 2011 17:25:13 +0000 (UTC) Received: from lucas.cup.hp.com (lucas.cup.hp.com [15.244.97.116]) by g4t0009.houston.hp.com (Postfix) with ESMTP id 37A18C07D; Thu, 6 Jan 2011 17:25:13 +0000 (UTC) Received: (from sje@localhost) by lucas.cup.hp.com (8.11.1 (PHNE_35485)/8.11.1) id p06HPCX21825; Thu, 6 Jan 2011 09:25:12 -0800 (PST) Date: Thu, 6 Jan 2011 09:25:12 -0800 (PST) Message-Id: <201101061725.p06HPCX21825@lucas.cup.hp.com> From: Steve Ellcey To: gcc-patches@gcc.gnu.org, rth@redhat.com Subject: Re: [ia64, rfa] vector pattern improvements In-Reply-To: <4CEA9782.1010402@redhat.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Richard, I am trying to fix the new IA64 vector instructions you added so they work on HP-UX (big-endian) and would like to get some feedback on whether or not I am going about it in the correct way. The attached patch fixes some (but not most) of the gcc.dg/vect failures I am seeing and I would like to verify that the vect_extract* instructions I am changing are the best place to address the big-endian/little-endian differences. At first I tried changing the vec_pack to call gen_vec_extract* with different options but now I think leaving the vec_pack* instructions alone and changing vec_extract* is better, but I am not sure if one or the other of these locations is considered the 'right' place to address endian issues. Can you offer any advise? Steve Ellcey sje@cup.hp.com Index: config/ia64/vect.md =================================================================== --- config/ia64/vect.md (revision 168534) +++ config/ia64/vect.md (working copy) @@ -1,5 +1,5 @@ ;; IA-64 machine description for vector operations. -;; Copyright (C) 2004, 2005, 2007, 2010 Free Software Foundation, Inc. +;; Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc. ;; ;; This file is part of GCC. ;; @@ -857,7 +857,10 @@ (define_expand "vec_extract_evenv8qi" "" { rtx temp = gen_reg_rtx (V8QImode); - emit_insn (gen_mix1_r (temp, operands[1], operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_mix1_r (temp, operands[2], operands[1])); + else + emit_insn (gen_mix1_r (temp, operands[1], operands[2])); emit_insn (gen_mux1_alt (operands[0], temp)); DONE; }) @@ -869,7 +872,10 @@ (define_expand "vec_extract_oddv8qi" "" { rtx temp = gen_reg_rtx (V8QImode); - emit_insn (gen_mix1_l (temp, operands[1], operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_mix1_l (temp, operands[2], operands[1])); + else + emit_insn (gen_mix1_l (temp, operands[1], operands[2])); emit_insn (gen_mux1_alt (operands[0], temp)); DONE; }) @@ -967,7 +973,10 @@ (define_expand "vec_extract_evenv4hi" "" { rtx temp = gen_reg_rtx (V4HImode); - emit_insn (gen_mix2_r (temp, operands[1], operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_mix2_r (temp, operands[2], operands[1])); + else + emit_insn (gen_mix2_r (temp, operands[1], operands[2])); emit_insn (gen_vec_extract_evenodd_helper (operands[0], temp)); DONE; }) @@ -979,7 +988,10 @@ (define_expand "vec_extract_oddv4hi" "" { rtx temp = gen_reg_rtx (V4HImode); - emit_insn (gen_mix2_l (temp, operands[1], operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_mix2_l (temp, operands[2], operands[1])); + else + emit_insn (gen_mix2_l (temp, operands[1], operands[2])); emit_insn (gen_vec_extract_evenodd_helper (operands[0], temp)); DONE; }) @@ -1024,8 +1036,12 @@ (define_expand "vec_extract_evenv2si" (match_operand:V2SI 2 "gr_register_operand" "")] "" { - emit_insn (gen_vec_interleave_lowv2si (operands[0], operands[1], - operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_vec_interleave_lowv2si (operands[0], operands[2], + operands[1])); + else + emit_insn (gen_vec_interleave_lowv2si (operands[0], operands[1], + operands[2])); DONE; }) @@ -1035,8 +1051,12 @@ (define_expand "vec_extract_oddv2si" (match_operand:V2SI 2 "gr_register_operand" "")] "" { - emit_insn (gen_vec_interleave_highv2si (operands[0], operands[1], - operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_vec_interleave_lowv2si (operands[0], operands[2], + operands[1])); + else + emit_insn (gen_vec_interleave_highv2si (operands[0], operands[1], + operands[2])); DONE; }) @@ -1399,8 +1419,12 @@ (define_expand "vec_extract_evenv2sf" (match_operand:V2SF 2 "gr_register_operand" "")] "" { - emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1], - operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[2], + operands[1])); + else + emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[1], + operands[2])); DONE; }) @@ -1410,8 +1434,12 @@ (define_expand "vec_extract_oddv2sf" (match_operand:V2SF 2 "gr_register_operand" "")] "" { - emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1], - operands[2])); + if (TARGET_BIG_ENDIAN) + emit_insn (gen_vec_interleave_lowv2sf (operands[0], operands[2], + operands[1])); + else + emit_insn (gen_vec_interleave_highv2sf (operands[0], operands[1], + operands[2])); DONE; })