From patchwork Thu Jan 6 11:24:11 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Macpaul Lin X-Patchwork-Id: 77704 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 9176DB70D6 for ; Thu, 6 Jan 2011 22:24:01 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6D40328178; Thu, 6 Jan 2011 12:23:55 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id H-FM8qVZH4MJ; Thu, 6 Jan 2011 12:23:55 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6308928170; Thu, 6 Jan 2011 12:23:53 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3052828170 for ; Thu, 6 Jan 2011 12:23:51 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id VnQNP1CNUX+C for ; Thu, 6 Jan 2011 12:23:49 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from ATCPCS06.andestech.com (59-124-160-117.HINET-IP.hinet.net [59.124.160.117]) by theia.denx.de (Postfix) with ESMTP id 06CF92816F for ; Thu, 6 Jan 2011 12:23:46 +0100 (CET) Received: from app01.andestech.com ([10.0.4.31]) by ATCPCS06.andestech.com with Microsoft SMTPSVC(6.0.3790.4675); Thu, 6 Jan 2011 19:24:17 +0800 From: Macpaul Lin To: u-boot@lists.denx.de, wd@denx.de, ratbert.chuang@gmail.com, ratbert@faraday-tech.com, albert.aribaud@free.fr Date: Thu, 6 Jan 2011 19:24:11 +0800 Message-Id: <1294313051-21902-1-git-send-email-macpaul@andestech.com> X-Mailer: git-send-email 1.7.3.2 X-OriginalArrivalTime: 06 Jan 2011 11:24:17.0497 (UTC) FILETIME=[41725C90:01CBAD94] Cc: Macpaul Lin Subject: [U-Boot] [PATCH] ftpmu010: fix relocation and enhance features X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de 1. ftpmu010.h: fix and add definitions Enhanced for more features and asm related support according to datasheet. Note: - FTPMU010_PDLLCR0_HCLKOUTDIS is "incorrect" in datasheet. - FTPMU010_PDLLCR0_DLLFRANG is only 1 bit at bit #19. (not 20-19) - FTPMU010_PDLLCR0_HCLKOUTDIS is 4 bits at bit #20. (not 24-21) 2. ftpmu010.c: enhance features and fix relocation - The following functions is added for pmu features. ftpmu010_mfpsr_select_dev() ftpmu010_sdramhtc_set() - This patch also fix the declare statement for relocation. Signed-off-by: Macpaul Lin --- Note: This patch was based on previous patch: [Patch v2 1/2] ftpmu010: support faraday ftpmu010 driver drivers/power/ftpmu010.c | 39 +++++++++++++++++++++++++++++++++++++-- drivers/power/ftpmu010.h | 38 +++++++++++++++++++++++++++++++++++--- 2 files changed, 72 insertions(+), 5 deletions(-) diff --git a/drivers/power/ftpmu010.c b/drivers/power/ftpmu010.c index 7924ac1..b072519 100644 --- a/drivers/power/ftpmu010.c +++ b/drivers/power/ftpmu010.c @@ -25,10 +25,10 @@ #include #include "ftpmu010.h" -static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; - +/* OSCC: OSC Control Register */ void ftpmu010_32768osc_enable(void) { + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; unsigned int oscc; /* enable the 32768Hz oscillator */ @@ -46,8 +46,31 @@ void ftpmu010_32768osc_enable(void) writel(oscc, &pmu->OSCC); } +/* MFPSR: Multi-Function Port Setting Register */ +void ftpmu010_mfpsr_select_dev(unsigned int dev) +{ + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + unsigned int mfpsr; + + mfpsr = readl(&pmu->MFPSR); + mfpsr |= dev; + writel(mfpsr, &pmu->MFPSR); +} + +void ftpmu010_mfpsr_diselect_dev(unsigned int dev) +{ + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + unsigned int mfpsr; + + mfpsr = readl(&pmu->MFPSR); + mfpsr &= ~dev; + writel(mfpsr, &pmu->MFPSR); +} + +/* PDLLCR0: PLL/DLL Control Register 0 */ void ftpmu010_dlldis_disable(void) { + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; unsigned int pdllcr0; pdllcr0 = readl(&pmu->PDLLCR0); @@ -57,9 +80,21 @@ void ftpmu010_dlldis_disable(void) void ftpmu010_sdram_clk_disable(unsigned int cr0) { + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; unsigned int pdllcr0; pdllcr0 = readl(&pmu->PDLLCR0); pdllcr0 |= FTPMU010_PDLLCR0_HCLKOUTDIS(cr0); writel(pdllcr0, &pmu->PDLLCR0); } + +/* SDRAMHTC: SDRAM Signal Hold Time Control */ +void ftpmu010_sdramhtc_set(unsigned int val) +{ + static struct ftpmu010 *pmu = (struct ftpmu010 *)CONFIG_FTPMU010_BASE; + unsigned int sdramhtc; + + sdramhtc = readl(&pmu->SDRAMHTC); + sdramhtc |= val; + writel(sdramhtc, &pmu->SDRAMHTC); +} diff --git a/drivers/power/ftpmu010.h b/drivers/power/ftpmu010.h index 8ef7a37..58c862b 100644 --- a/drivers/power/ftpmu010.h +++ b/drivers/power/ftpmu010.h @@ -126,21 +126,53 @@ struct ftpmu010 { /* * Multi-Function Port Setting Register */ +#define FTPMU010_MFPSR_DEBUGSEL (1 << 17) +#define FTPMU010_MFPSR_DMA0PINSEL (1 << 16) +#define FTPMU010_MFPSR_DMA1PINSEL (1 << 15) #define FTPMU010_MFPSR_MODEMPINSEL (1 << 14) #define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13) +#define FTPMU010_MFPSR_PWM1PINSEL (1 << 11) +#define FTPMU010_MFPSR_PWM0PINSEL (1 << 10) +#define FTPMU010_MFPSR_IRDACLKSEL (1 << 9) +#define FTPMU010_MFPSR_UARTCLKSEL (1 << 8) +#define FTPMU010_MFPSR_SSPCLKSEL (1 << 6) +#define FTPMU010_MFPSR_I2SCLKSEL (1 << 5) +#define FTPMU010_MFPSR_AC97CLKSEL (1 << 4) #define FTPMU010_MFPSR_AC97PINSEL (1 << 3) +#define FTPMU010_MFPSR_TRIAHBDIS (1 << 1) +#define FTPMU010_MFPSR_TRIAHBDBG (1 << 0) /* * PLL/DLL Control Register 0 + * Note: + * 1. FTPMU010_PDLLCR0_HCLKOUTDIS: + * Datasheet indicated it starts at bit #21 which was wrong. + * 2. FTPMU010_PDLLCR0_DLLFRAG: + * Datasheet indicated it has 2 bit which was wrong. */ -#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) >> 20) & 0xf) -#define FTPMU010_PDLLCR0_DLLFRAG (1 << 19) +#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) & 0xf) << 20) +#define FTPMU010_PDLLCR0_DLLFRAG(cr0) (1 << 19) #define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18) #define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17) #define FTPMU010_PDLLCR0_DLLDIS (1 << 16) -#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) >> 3) & 0x1ff) +#define FTPMU010_PDLLCR0_PLL1FRANG(cr0) (((cr0) & 0x3) << 12) +#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) & 0x1ff) << 3) #define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2) #define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1) #define FTPMU010_PDLLCR0_PLL1DIS (1 << 0) +/* + * SDRAM Signal Hold Time Control Register + */ +#define FTPMU010_SDRAMHTC_RCLK_DLY(x) (((x) & 0xf) << 28) +#define FTPMU010_SDRAMHTC_CTL_WCLK_DLY(x) (((x) & 0xf) << 24) +#define FTPMU010_SDRAMHTC_DAT_WCLK_DLY(x) (((x) & 0xf) << 20) +#define FTPMU010_SDRAMHTC_EBICTRL_DCSR (1 << 18) +#define FTPMU010_SDRAMHTC_EBIDATA_DCSR (1 << 17) +#define FTPMU010_SDRAMHTC_SDRAMCS_DCSR (1 << 16) +#define FTPMU010_SDRAMHTC_SDRAMCTL_DCSR (1 << 15) +#define FTPMU010_SDRAMHTC_CKE_DCSR (1 << 14) +#define FTPMU010_SDRAMHTC_DQM_DCSR (1 << 13) +#define FTPMU010_SDRAMHTC_SDCLK_DCSR (1 << 12) + #endif /* __FTPMU010_H */