diff mbox

driver: mtd: ifc: Initialize SRAM for all version >= 1.0

Message ID 1497005841-7750-1-git-send-email-prabhakar.kushwaha@nxp.com
State Accepted
Commit d1ab0da84dcbac30a9039ccef72d69bf0a68bfc7
Delegated to: Boris Brezillon
Headers show

Commit Message

Prabhakar Kushwaha June 9, 2017, 10:57 a.m. UTC
All IFC version >= 1.0 use 28nm technology for SRAM. Here SRAM has
a requirement to initialize before any read operation performed for
avoiding ECC Error.

So update condition check to initialize SRAM for all IFC version >= 1.0.0

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
---
 drivers/mtd/nand/fsl_ifc_nand.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Boris Brezillon June 20, 2017, 7:19 a.m. UTC | #1
Hi Prabhakar,

Please Cc me next time you submit a NAND related change.

On Fri, 9 Jun 2017 16:27:21 +0530
Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> wrote:

> All IFC version >= 1.0 use 28nm technology for SRAM. Here SRAM has
> a requirement to initialize before any read operation performed for
> avoiding ECC Error.
> 
> So update condition check to initialize SRAM for all IFC version >= 1.0.0

Applied after changing the subject prefix to "mtd: nand: ifc".

Thanks,

Boris

> 
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
> ---
>  drivers/mtd/nand/fsl_ifc_nand.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
> index d1570f5..eca269d 100644
> --- a/drivers/mtd/nand/fsl_ifc_nand.c
> +++ b/drivers/mtd/nand/fsl_ifc_nand.c
> @@ -904,7 +904,7 @@ static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
>  		chip->ecc.algo = NAND_ECC_HAMMING;
>  	}
>  
> -	if (ctrl->version == FSL_IFC_VERSION_1_1_0)
> +	if (ctrl->version >= FSL_IFC_VERSION_1_1_0)
>  		fsl_ifc_sram_init(priv);
>  
>  	return 0;
diff mbox

Patch

diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index d1570f5..eca269d 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -904,7 +904,7 @@  static int fsl_ifc_chip_init(struct fsl_ifc_mtd *priv)
 		chip->ecc.algo = NAND_ECC_HAMMING;
 	}
 
-	if (ctrl->version == FSL_IFC_VERSION_1_1_0)
+	if (ctrl->version >= FSL_IFC_VERSION_1_1_0)
 		fsl_ifc_sram_init(priv);
 
 	return 0;