Patchwork [6/6] target-ppc: Implement correct NaN propagation rules

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Submitter Aurelien Jarno
Date Jan. 3, 2011, 2:34 p.m.
Message ID <1294065273-30274-7-git-send-email-aurelien@aurel32.net>
Download mbox | patch
Permalink /patch/77280/
State New
Headers show

Comments

Aurelien Jarno - Jan. 3, 2011, 2:34 p.m.
Implement the correct NaN propagation rules for ARM targets by
providing an appropriate pickNaN function.

Also fix the #ifdef tests for default NaN definition, the correct name
is TARGET_PPC instead of TARGET_POWERPC.

Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 fpu/softfloat-specialize.h |   19 +++++++++++++++++--
 1 files changed, 17 insertions(+), 2 deletions(-)
Nathan Froyd - Jan. 5, 2011, 12:45 p.m.
On Mon, Jan 03, 2011 at 03:34:33PM +0100, Aurelien Jarno wrote:
> Implement the correct NaN propagation rules for ARM targets by
> providing an appropriate pickNaN function.
> 
> Also fix the #ifdef tests for default NaN definition, the correct name
> is TARGET_PPC instead of TARGET_POWERPC.

Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>

> +     * A signaling NaN is always quietened before returning it.

I think "silenced" is more natural here, but I can understand preferring
"quiet" in keeping with NaN terminology.

-Nathan
Alexander Graf - Jan. 5, 2011, 5:24 p.m.
On 03.01.2011, at 15:34, Aurelien Jarno wrote:

> Implement the correct NaN propagation rules for ARM targets by
> providing an appropriate pickNaN function.
> 
> Also fix the #ifdef tests for default NaN definition, the correct name
> is TARGET_PPC instead of TARGET_POWERPC.
> 
> Cc: Alexander Graf <agraf@suse.de>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Looks syntactically correct, no idea if it's semantically right too. I suppose you did verify that though.


Alex

Patch

diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index 150500b..0f6dbd0 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -61,7 +61,7 @@  typedef struct {
 *----------------------------------------------------------------------------*/
 #if defined(TARGET_SPARC)
 #define float32_default_nan make_float32(0x7FFFFFFF)
-#elif defined(TARGET_POWERPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
+#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
 #define float32_default_nan make_float32(0x7FC00000)
 #elif SNAN_BIT_IS_ONE
 #define float32_default_nan make_float32(0x7FBFFFFF)
@@ -214,6 +214,21 @@  static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
         return 1;
     }
 }
+#elif defined(TARGET_PPC)
+static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
+                   flag aIsLargerSignificand)
+{
+    /* PowerPC propagation rules:
+     *  1. A if it sNaN or qNaN
+     *  2. B if it sNaN or qNaN
+     * A signaling NaN is always quietened before returning it.
+     */
+    if (aIsSNaN || aIsQNaN) {
+        return 0;
+    } else {
+        return 1;
+    }
+}
 #else
 static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
                     flag aIsLargerSignificand)
@@ -292,7 +307,7 @@  static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
 *----------------------------------------------------------------------------*/
 #if defined(TARGET_SPARC)
 #define float64_default_nan make_float64(LIT64( 0x7FFFFFFFFFFFFFFF ))
-#elif defined(TARGET_POWERPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
+#elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
 #define float64_default_nan make_float64(LIT64( 0x7FF8000000000000 ))
 #elif SNAN_BIT_IS_ONE
 #define float64_default_nan make_float64(LIT64( 0x7FF7FFFFFFFFFFFF ))