From patchwork Mon Jan 3 14:34:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 77278 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 1337BB70E3 for ; Tue, 4 Jan 2011 01:42:20 +1100 (EST) Received: from localhost ([127.0.0.1]:52159 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PZlc1-0006a8-93 for incoming@patchwork.ozlabs.org; Mon, 03 Jan 2011 09:42:17 -0500 Received: from [140.186.70.92] (port=55304 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PZlUm-000305-4V for qemu-devel@nongnu.org; Mon, 03 Jan 2011 09:34:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PZlUk-0002RF-LY for qemu-devel@nongnu.org; Mon, 03 Jan 2011 09:34:47 -0500 Received: from hall.aurel32.net ([88.191.126.93]:45107) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PZlUk-0002R2-EZ for qemu-devel@nongnu.org; Mon, 03 Jan 2011 09:34:46 -0500 Received: from [2001:470:d4ed:0:5e26:aff:fe2b:6f5b] (helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1PZlUj-0000JM-Nr; Mon, 03 Jan 2011 15:34:45 +0100 Received: from aurel32 by volta.aurel32.net with local (Exim 4.72) (envelope-from ) id 1PZlUf-0007wA-JT; Mon, 03 Jan 2011 15:34:41 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Mon, 3 Jan 2011 15:34:32 +0100 Message-Id: <1294065273-30274-6-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.2.3 In-Reply-To: <1294065273-30274-1-git-send-email-aurelien@aurel32.net> References: <1294065273-30274-1-git-send-email-aurelien@aurel32.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH 5/6] target-mips: Implement correct NaN propagation rules X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement the correct NaN propagation rules for MIPS targets by providing an appropriate pickNaN function. Signed-off-by: Aurelien Jarno --- fpu/softfloat-specialize.h | 27 +++++++++++++++++++++++++++ 1 files changed, 27 insertions(+), 0 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 4deb165..150500b 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -187,6 +187,33 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, return 1; } } +#elif defined (TARGET_MIPS) +static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, + flag aIsLargerSignificand) +{ + /* According to MIPS specifications, if one of the two operands is + * a sNaN, a new qNaN has to be generated. This is done in + * floatXX_maybe_silence_nan(). For qNaN inputs the specifications + * says: "When possible, this QNaN result is one of the operand QNaN + * values." In practice it seems that most implementations choose + * the first operand if both operands are qNaN. In short this gives + * the following rules: + * 1. A if it is signaling + * 2. B if it is signaling + * 3. A (quiet) + * 4. B (quiet) + * A signaling NaN is always quietened before returning it. + */ + if (aIsSNaN) { + return 0; + } else if (bIsSNaN) { + return 1; + } else if (aIsQNaN) { + return 0; + } else { + return 1; + } +} #else static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN, flag aIsLargerSignificand)