| Message ID | 20170606010621.GH1723@techyauld.com |
|---|---|
| State | Accepted |
| Commit | abf54bf978ed9932d69ee7f937012398d0d8d08f |
| Delegated to: | Jaehoon Chung |
| Headers | show |
On Tue, 6 Jun 2017 09:06:21 +0800 Brock Zheng Techyauld Ltd <yzheng@techyauld.com> wrote: > The addresses of the registers in TI TPS65217 are not continuous. > There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17 > register available. > > Fixup the enum values by adding a 'reserved' placeholder to > correct the addresses higher than 0x17. > > Series-to: Heiko Schocher <hs@denx.de> > > Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com> > --- > > include/power/tps65217.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/include/power/tps65217.h b/include/power/tps65217.h > index 69a49f76fe..cb07ea5ce6 100644 > --- a/include/power/tps65217.h > +++ b/include/power/tps65217.h > @@ -38,6 +38,7 @@ enum { > TPS65217_DEFLS1, > TPS65217_DEFLS2, > TPS65217_ENABLE, > + TPS65217_RESERVED0, /* no 0x17 register available */ > TPS65217_DEFUVLO, > TPS65217_SEQ1, > TPS65217_SEQ2, Reviewed-by: Lukasz Majewski <lukma@denx.de> Best regards, Lukasz Majewski -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
On 06/07/2017 04:25 PM, Lukasz Majewski wrote: > On Tue, 6 Jun 2017 09:06:21 +0800 > Brock Zheng Techyauld Ltd <yzheng@techyauld.com> wrote: > >> The addresses of the registers in TI TPS65217 are not continuous. >> There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17 >> register available. >> >> Fixup the enum values by adding a 'reserved' placeholder to >> correct the addresses higher than 0x17. >> >> Series-to: Heiko Schocher <hs@denx.de> >> >> Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com> >> --- >> >> include/power/tps65217.h | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/include/power/tps65217.h b/include/power/tps65217.h >> index 69a49f76fe..cb07ea5ce6 100644 >> --- a/include/power/tps65217.h >> +++ b/include/power/tps65217.h >> @@ -38,6 +38,7 @@ enum { >> TPS65217_DEFLS1, >> TPS65217_DEFLS2, >> TPS65217_ENABLE, >> + TPS65217_RESERVED0, /* no 0x17 register available */ >> TPS65217_DEFUVLO, >> TPS65217_SEQ1, >> TPS65217_SEQ2, > > Reviewed-by: Lukasz Majewski <lukma@denx.de> Applied to u-boot-mmc for pmic. Thanks. Best Regards, Jaehoon Chung > > > Best regards, > > Lukasz Majewski > > -- > > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot >
diff --git a/include/power/tps65217.h b/include/power/tps65217.h index 69a49f76fe..cb07ea5ce6 100644 --- a/include/power/tps65217.h +++ b/include/power/tps65217.h @@ -38,6 +38,7 @@ enum { TPS65217_DEFLS1, TPS65217_DEFLS2, TPS65217_ENABLE, + TPS65217_RESERVED0, /* no 0x17 register available */ TPS65217_DEFUVLO, TPS65217_SEQ1, TPS65217_SEQ2,
The addresses of the registers in TI TPS65217 are not continuous. There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17 register available. Fixup the enum values by adding a 'reserved' placeholder to correct the addresses higher than 0x17. Series-to: Heiko Schocher <hs@denx.de> Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com> --- include/power/tps65217.h | 1 + 1 file changed, 1 insertion(+)