Patchwork [U-Boot] PPC4xx: Reduce NAND TLB window size on Canyonlands

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Submitter Felix Radensky
Date Jan. 2, 2011, 9:07 a.m.
Message ID <1293959254-14478-1-git-send-email-felix@embedded-sol.com>
Download mbox | patch
Permalink /patch/77178/
State Accepted
Commit da7d3dffacbd30942c8c63dc2cef5c1c7854cde5
Delegated to: Stefan Roese
Headers show

Comments

Felix Radensky - Jan. 2, 2011, 9:07 a.m.
16MiB NAND TLB window is way too big. Reduce it to 1KiB.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
---
 board/amcc/canyonlands/init.S |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
Stefan Roese - Jan. 10, 2011, 11:52 a.m.
On Sunday 02 January 2011 10:07:34 Felix Radensky wrote:
> 16MiB NAND TLB window is way too big. Reduce it to 1KiB.

Applied to u-boot-ppc4xx. Thanks.

Cheers,
Stefan

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Patch

diff --git a/board/amcc/canyonlands/init.S b/board/amcc/canyonlands/init.S
index 680feaa..8b7bfce 100644
--- a/board/amcc/canyonlands/init.S
+++ b/board/amcc/canyonlands/init.S
@@ -80,7 +80,7 @@  tlbtab:
 
 #if !defined(CONFIG_ARCHES)
 	/* TLB-entry for NAND */
-	tlbentry(CONFIG_SYS_NAND_ADDR, SZ_16M, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)
+	tlbentry(CONFIG_SYS_NAND_ADDR, SZ_1K, CONFIG_SYS_NAND_ADDR, 4, AC_RWX | SA_IG)
 
 	/* TLB-entry for CPLD */
 	tlbentry(CONFIG_SYS_BCSR_BASE, SZ_1K, CONFIG_SYS_BCSR_BASE, 4, AC_RW | SA_IG)