Message ID | 20170605074301.11310-1-joel@jms.id.au |
---|---|
State | Accepted, archived |
Headers | show |
On Mon, 2017-06-05 at 17:13 +0930, Joel Stanley wrote: > This describes the SBE FIFO and OCC device that are attached via the FSI > bus. > > As this layout is common to all existing p9 machines, we add them via a > dtsi. This dtsi requires the 'fsi' label be present. > > Signed-off-by: Joel Stanley <joel@jms.id.au> There are a number of ways we can lay out the nodes in the dtsi, but I'll save the bikeshedding. What you have looks good to me. Acked-by: Andrew Jeffery <andrew@aj.id.au> > --- > arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 8 +++-- > arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 8 +++-- > arch/arm/boot/dts/ibm-power9-cfam.dtsi | 45 ++++++++++++++++++++++++ > 3 files changed, 55 insertions(+), 6 deletions(-) > create mode 100644 arch/arm/boot/dts/ibm-power9-cfam.dtsi > > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > index 03cde39189c5..dd01dfaa8509 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > @@ -47,10 +47,10 @@ > > }; > > }; > > > - gpio-fsi { > > + fsi: gpio-fsi { > > compatible = "fsi-master-gpio", "fsi-master"; > - > > - status = "okay"; > > + #address-cells = <2>; > > + #size-cells = <0>; > > > clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; > > data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>; > @@ -70,6 +70,8 @@ > > }; > }; > > +#include "ibm-power9-cfam.dtsi" > + > &fmc { > > status = "okay"; > > flash@0 { > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > index 3001597d42d9..42b70a5d57aa 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > @@ -63,10 +63,10 @@ > > }; > > }; > > > - gpio-fsi { > > + fsi: gpio-fsi { > > compatible = "fsi-master-gpio", "fsi-master"; > - > > - status = "okay"; > > + #address-cells = <2>; > > + #size-cells = <0>; > > > clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; > > data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; > @@ -81,6 +81,8 @@ > > }; > }; > > +#include "ibm-power9-cfam.dtsi" > + > &fmc { > > status = "okay"; > > flash@0 { > diff --git a/arch/arm/boot/dts/ibm-power9-cfam.dtsi b/arch/arm/boot/dts/ibm-power9-cfam.dtsi > new file mode 100644 > index 000000000000..5beb978f9f31 > --- /dev/null > +++ b/arch/arm/boot/dts/ibm-power9-cfam.dtsi > @@ -0,0 +1,45 @@ > +&fsi { > > + cfam@0,0 { > > + reg = <0 0>; > > + #address-cells = <1>; > > + #size-cells = <1>; > + > > + sbefifo@2400 { > > + compatible = "ibm,p9-sbefifo"; > > + reg = <0x2400 0x400>; > > + #address-cells = <1>; > > + #size-cells = <0>; > + > > + occ@1 { > > + compatible = "ibm,p9-occ"; > > + reg = <1>; > > + }; > > + }; > + > > + hub@3400 { > > + compatible = "fsi-master-hub"; > > + reg = <0x3400 0x400>; > > + #address-cells = <2>; > > + #size-cells = <0>; > + > > + cfam@1,0 { > > + reg = <1 0>; > > + #address-cells = <1>; > > + #size-cells = <1>; > + > > + sbefifo@2400 { > > + compatible = "ibm,p9-sbefifo"; > > + reg = <0x2400 0x400>; > > + #address-cells = <1>; > > + #size-cells = <0>; > + > > + occ@2 { > > + compatible = > > + "ibm,p9-occ"; > > + reg = <2>; > > + }; > > + }; > > + }; > > + }; > > + }; > +};
Acked-by: Lei YU <mine260309@gmail.com> On Mon, Jun 5, 2017 at 3:43 PM, Joel Stanley <joel@jms.id.au> wrote: > This describes the SBE FIFO and OCC device that are attached via the FSI > bus. > > As this layout is common to all existing p9 machines, we add them via a > dtsi. This dtsi requires the 'fsi' label be present. > > Signed-off-by: Joel Stanley <joel@jms.id.au> > --- > arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 8 +++-- > arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 8 +++-- > arch/arm/boot/dts/ibm-power9-cfam.dtsi | 45 ++++++++++++++++++++++++ > 3 files changed, 55 insertions(+), 6 deletions(-) > create mode 100644 arch/arm/boot/dts/ibm-power9-cfam.dtsi > > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > index 03cde39189c5..dd01dfaa8509 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts > @@ -47,10 +47,10 @@ > }; > }; > > - gpio-fsi { > + fsi: gpio-fsi { > compatible = "fsi-master-gpio", "fsi-master"; > - > - status = "okay"; > + #address-cells = <2>; > + #size-cells = <0>; > > clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; > data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>; > @@ -70,6 +70,8 @@ > }; > }; > > +#include "ibm-power9-cfam.dtsi" > + > &fmc { > status = "okay"; > flash@0 { > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > index 3001597d42d9..42b70a5d57aa 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts > @@ -63,10 +63,10 @@ > }; > }; > > - gpio-fsi { > + fsi: gpio-fsi { > compatible = "fsi-master-gpio", "fsi-master"; > - > - status = "okay"; > + #address-cells = <2>; > + #size-cells = <0>; > > clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; > data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; > @@ -81,6 +81,8 @@ > }; > }; > > +#include "ibm-power9-cfam.dtsi" > + > &fmc { > status = "okay"; > flash@0 { > diff --git a/arch/arm/boot/dts/ibm-power9-cfam.dtsi b/arch/arm/boot/dts/ibm-power9-cfam.dtsi > new file mode 100644 > index 000000000000..5beb978f9f31 > --- /dev/null > +++ b/arch/arm/boot/dts/ibm-power9-cfam.dtsi > @@ -0,0 +1,45 @@ > +&fsi { > + cfam@0,0 { > + reg = <0 0>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + sbefifo@2400 { > + compatible = "ibm,p9-sbefifo"; > + reg = <0x2400 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + occ@1 { > + compatible = "ibm,p9-occ"; > + reg = <1>; > + }; > + }; > + > + hub@3400 { > + compatible = "fsi-master-hub"; > + reg = <0x3400 0x400>; > + #address-cells = <2>; > + #size-cells = <0>; > + > + cfam@1,0 { > + reg = <1 0>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + sbefifo@2400 { > + compatible = "ibm,p9-sbefifo"; > + reg = <0x2400 0x400>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + occ@2 { > + compatible = > + "ibm,p9-occ"; > + reg = <2>; > + }; > + }; > + }; > + }; > + }; > +}; > -- > 2.11.0 >
Hi Joel, > This describes the SBE FIFO and OCC device that are attached via the FSI > bus. > > As this layout is common to all existing p9 machines, we add them via a > dtsi. This dtsi requires the 'fsi' label be present. Sounds like a good idea, no need to replicate the p9 FSI topology in each BMC's device tree. > - gpio-fsi { > + fsi: gpio-fsi { > compatible = "fsi-master-gpio", "fsi-master"; > - > - status = "okay"; > + #address-cells = <2>; > + #size-cells = <0>; We might want to keep #address-cells and #size-cells in the common include, but then we're splitting properties (ie. compatible) between the two files. I'm happy either way though. Acked-by: Jeremy Kerr <jk@ozlabs.org> Cheers, Jeremy
On Tue, Jun 6, 2017 at 3:16 PM, Jeremy Kerr <jk@ozlabs.org> wrote: > Hi Joel, > >> This describes the SBE FIFO and OCC device that are attached via the FSI >> bus. >> >> As this layout is common to all existing p9 machines, we add them via a >> dtsi. This dtsi requires the 'fsi' label be present. > > Sounds like a good idea, no need to replicate the p9 FSI topology in > each BMC's device tree. > >> - gpio-fsi { >> + fsi: gpio-fsi { >> compatible = "fsi-master-gpio", "fsi-master"; >> - >> - status = "okay"; >> + #address-cells = <2>; >> + #size-cells = <0>; > > We might want to keep #address-cells and #size-cells in the common > include, but then we're splitting properties (ie. compatible) between > the two files. I'm happy either way though. Ok. I will leave it as is for now, but as we extend the FSI dtsi we may want to revisit. > Acked-by: Jeremy Kerr <jk@ozlabs.org> Thank you for taking a look! Cheers, Joel
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts index 03cde39189c5..dd01dfaa8509 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts @@ -47,10 +47,10 @@ }; }; - gpio-fsi { + fsi: gpio-fsi { compatible = "fsi-master-gpio", "fsi-master"; - - status = "okay"; + #address-cells = <2>; + #size-cells = <0>; clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>; @@ -70,6 +70,8 @@ }; }; +#include "ibm-power9-cfam.dtsi" + &fmc { status = "okay"; flash@0 { diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts index 3001597d42d9..42b70a5d57aa 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts @@ -63,10 +63,10 @@ }; }; - gpio-fsi { + fsi: gpio-fsi { compatible = "fsi-master-gpio", "fsi-master"; - - status = "okay"; + #address-cells = <2>; + #size-cells = <0>; clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>; data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>; @@ -81,6 +81,8 @@ }; }; +#include "ibm-power9-cfam.dtsi" + &fmc { status = "okay"; flash@0 { diff --git a/arch/arm/boot/dts/ibm-power9-cfam.dtsi b/arch/arm/boot/dts/ibm-power9-cfam.dtsi new file mode 100644 index 000000000000..5beb978f9f31 --- /dev/null +++ b/arch/arm/boot/dts/ibm-power9-cfam.dtsi @@ -0,0 +1,45 @@ +&fsi { + cfam@0,0 { + reg = <0 0>; + #address-cells = <1>; + #size-cells = <1>; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + occ@1 { + compatible = "ibm,p9-occ"; + reg = <1>; + }; + }; + + hub@3400 { + compatible = "fsi-master-hub"; + reg = <0x3400 0x400>; + #address-cells = <2>; + #size-cells = <0>; + + cfam@1,0 { + reg = <1 0>; + #address-cells = <1>; + #size-cells = <1>; + + sbefifo@2400 { + compatible = "ibm,p9-sbefifo"; + reg = <0x2400 0x400>; + #address-cells = <1>; + #size-cells = <0>; + + occ@2 { + compatible = + "ibm,p9-occ"; + reg = <2>; + }; + }; + }; + }; + }; +};
This describes the SBE FIFO and OCC device that are attached via the FSI bus. As this layout is common to all existing p9 machines, we add them via a dtsi. This dtsi requires the 'fsi' label be present. Signed-off-by: Joel Stanley <joel@jms.id.au> --- arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 8 +++-- arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts | 8 +++-- arch/arm/boot/dts/ibm-power9-cfam.dtsi | 45 ++++++++++++++++++++++++ 3 files changed, 55 insertions(+), 6 deletions(-) create mode 100644 arch/arm/boot/dts/ibm-power9-cfam.dtsi