From patchwork Fri Dec 31 19:11:09 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aurelien Jarno X-Patchwork-Id: 77097 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3E0C6B7088 for ; Sat, 1 Jan 2011 06:13:12 +1100 (EST) Received: from localhost ([127.0.0.1]:59282 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PYkPW-0004eg-21 for incoming@patchwork.ozlabs.org; Fri, 31 Dec 2010 14:13:10 -0500 Received: from [140.186.70.92] (port=39974 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PYkNf-0003wH-BB for qemu-devel@nongnu.org; Fri, 31 Dec 2010 14:11:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PYkNe-0003Zh-AK for qemu-devel@nongnu.org; Fri, 31 Dec 2010 14:11:15 -0500 Received: from hall.aurel32.net ([88.191.126.93]:60191) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PYkNe-0003ZW-0u for qemu-devel@nongnu.org; Fri, 31 Dec 2010 14:11:14 -0500 Received: from farad.aurel32.net ([82.232.2.251] helo=volta.aurel32.net) by hall.aurel32.net with esmtpsa (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.69) (envelope-from ) id 1PYkNd-0001tk-DD; Fri, 31 Dec 2010 20:11:13 +0100 Received: from aurel32 by volta.aurel32.net with local (Exim 4.72) (envelope-from ) id 1PYkNb-00013Y-Oe; Fri, 31 Dec 2010 20:11:11 +0100 From: Aurelien Jarno To: qemu-devel@nongnu.org Date: Fri, 31 Dec 2010 20:11:09 +0100 Message-Id: <1293822669-3983-1-git-send-email-aurelien@aurel32.net> X-Mailer: git-send-email 1.7.2.3 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH] target-arm: fix UMAAL instruction X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org UMAAL should use unsigned multiply instead of signed. This patch fixes this issue by handling UMAAL separately from UMULL/UMLAL/SMULL/SUMLAL are these instructions are different enough. It also explicitely list instructions in case and catch inexistant instruction as illegal. Also fixes a few style issues. This fixes the issues reported in https://bugs.launchpad.net/qemu/+bug/696015 Signed-off-by: Aurelien Jarno --- target-arm/translate.c | 30 +++++++++++++++++++++--------- 1 files changed, 21 insertions(+), 9 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 8d494ec..eb207a8 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6637,26 +6637,38 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) gen_logic_CC(tmp); store_reg(s, rd, tmp); break; - default: + case 4: + /* 64 bit mul double accumulate */ + ARCH(6); + tmp = load_reg(s, rs); + tmp2 = load_reg(s, rm); + tmp64 = gen_mulu_i64_i32(tmp, tmp2); + gen_addq_lo(s, tmp64, rn); + gen_addq_lo(s, tmp64, rd); + gen_storeq_reg(s, rn, rd, tmp64); + tcg_temp_free_i64(tmp64); + break; + case 8: case 9: case 10: case 11: + case 12: case 13: case 14: case 15: /* 64 bit mul */ tmp = load_reg(s, rs); tmp2 = load_reg(s, rm); - if (insn & (1 << 22)) + if (insn & (1 << 22)) { tmp64 = gen_muls_i64_i32(tmp, tmp2); - else + } else { tmp64 = gen_mulu_i64_i32(tmp, tmp2); - if (insn & (1 << 21)) /* mult accumulate */ + } + if (insn & (1 << 21)) { /* mult accumulate */ gen_addq(s, tmp64, rn, rd); - if (!(insn & (1 << 23))) { /* double accumulate */ - ARCH(6); - gen_addq_lo(s, tmp64, rn); - gen_addq_lo(s, tmp64, rd); } - if (insn & (1 << 20)) + if (insn & (1 << 20)) { gen_logicq_cc(tmp64); + } gen_storeq_reg(s, rn, rd, tmp64); tcg_temp_free_i64(tmp64); break; + default: + goto illegal_op; } } else { rn = (insn >> 16) & 0xf;