From patchwork Fri Dec 31 14:26:11 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jie Zhang X-Patchwork-Id: 77082 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 38E501007D2 for ; Sat, 1 Jan 2011 01:26:27 +1100 (EST) Received: (qmail 2392 invoked by alias); 31 Dec 2010 14:26:25 -0000 Received: (qmail 2383 invoked by uid 22791); 31 Dec 2010 14:26:25 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL, BAYES_00, T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 31 Dec 2010 14:26:19 +0000 Received: (qmail 32590 invoked from network); 31 Dec 2010 14:26:16 -0000 Received: from unknown (HELO ?192.168.0.105?) (jie@127.0.0.2) by mail.codesourcery.com with ESMTPA; 31 Dec 2010 14:26:16 -0000 Message-ID: <4D1DE803.8060805@codesourcery.com> Date: Fri, 31 Dec 2010 22:26:11 +0800 From: Jie Zhang User-Agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv:1.9.2.13) Gecko/20101213 Lightning/1.0b2 Icedove/3.1.7 MIME-Version: 1.0 To: gcc-patches@gcc.gnu.org Subject: [ARM, RFC] Fix strange code in arm_legitimize_address X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, I found this while looking at something else. The following code in arm_legitimize_address is confusing for me: if (GET_CODE (x) == PLUS) { rtx xop0 = XEXP (x, 0); rtx xop1 = XEXP (x, 1); if (CONSTANT_P (xop0) && !symbol_mentioned_p (xop0)) xop0 = force_reg (SImode, xop0); if (CONSTANT_P (xop1) && !symbol_mentioned_p (xop1)) xop1 = force_reg (SImode, xop1); <== code A if (ARM_BASE_REGISTER_RTX_P (xop0) && GET_CODE (xop1) == CONST_INT) { ... <== code B } ... } The code B will never be executed since xop1 will never be a CONST_INT. If it were, it would have already been put into a reg by code A. I did some digging. "!symbol_mentioned_p (xop1)" was brought into the code by revision 10681, which is every old and hence no patch email The attached patch replaces !symbol_mentioned_p with symbol_mentioned_p in arm_legitimize_address. It shows an improvement for the following small test: int buf[100000]; int foo () { return buf[40000]; } For the default multilib and -O2, the trunk without the patch gives foo: ldr r3, .L2 ldr r2, .L2+4 ldr r0, [r2, r3] bx lr .L3: .align 2 .L2: .word 160000 .word buf .size foo, .-foo .comm buf,400000,4 With the patch: foo: ldr r3, .L2 ldr r0, [r3, #256] bx lr .L3: .align 2 .L2: .word buf+159744 .size foo, .-foo .comm buf,400000,4 So with the patch, we save one LDR instruction and one entry in constant pool. No regressions are found when testing arm-none-eabi for the default multilib with --target_board=arm-sim. OK? Regards, * config/arm/arm.c (arm_legitimize_address): Replace !symbol_mentioned_p with symbol_mentioned_p. Index: config/arm/arm.c =================================================================== --- config/arm/arm.c (revision 168310) +++ config/arm/arm.c (working copy) @@ -6217,10 +6217,10 @@ arm_legitimize_address (rtx x, rtx orig_ rtx xop0 = XEXP (x, 0); rtx xop1 = XEXP (x, 1); - if (CONSTANT_P (xop0) && !symbol_mentioned_p (xop0)) + if (CONSTANT_P (xop0) && symbol_mentioned_p (xop0)) xop0 = force_reg (SImode, xop0); - if (CONSTANT_P (xop1) && !symbol_mentioned_p (xop1)) + if (CONSTANT_P (xop1) && symbol_mentioned_p (xop1)) xop1 = force_reg (SImode, xop1); if (ARM_BASE_REGISTER_RTX_P (xop0) @@ -6269,7 +6269,7 @@ arm_legitimize_address (rtx x, rtx orig_ if (CONSTANT_P (xop0)) xop0 = force_reg (SImode, xop0); - if (CONSTANT_P (xop1) && ! symbol_mentioned_p (xop1)) + if (CONSTANT_P (xop1) && symbol_mentioned_p (xop1)) xop1 = force_reg (SImode, xop1); if (xop0 != XEXP (x, 0) || xop1 != XEXP (x, 1))