From patchwork Tue Dec 28 21:24:39 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 76867 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id AA2A31007D2 for ; Wed, 29 Dec 2010 08:26:01 +1100 (EST) Received: from localhost ([127.0.0.1]:44030 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PXh3M-0001PZ-JI for incoming@patchwork.ozlabs.org; Tue, 28 Dec 2010 16:25:56 -0500 Received: from [140.186.70.92] (port=47438 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PXh2d-0001Os-S3 for qemu-devel@nongnu.org; Tue, 28 Dec 2010 16:25:26 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PXh2U-00048P-5B for qemu-devel@nongnu.org; Tue, 28 Dec 2010 16:25:11 -0500 Received: from mail-px0-f173.google.com ([209.85.212.173]:42629) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PXh2T-00047j-SW for qemu-devel@nongnu.org; Tue, 28 Dec 2010 16:25:02 -0500 Received: by pxi16 with SMTP id 16so2303571pxi.4 for ; Tue, 28 Dec 2010 13:25:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:mime-version:received:from:date :message-id:subject:to:content-type; bh=3mqFpvpG2gdbVZwt4SQ5lqtVHe/7JUFj4677/i2fI60=; b=X5g05j8ZbrYOVoHg+ML8FWMv/8VhwkyEHXcJt7xCob0SswwllkT3OTDGipa6tvCVW1 NrpitIqBcG6mGAeMi3tmi6gpAuW38sAq0aK/4VzkdncGRgEh9N9Se7ZgdlAg2teu/OfT RIQfaeI2BDvm67aQDnfE1AeXawMU/sautwJtI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=WWU6O4WQHKpoQDcPRgiNAXme3Fe4TEKKbKsnF8PPRJ7LXpLEmpD1RM2/VR9CFtzW5v tC10RrTOjA1psMK8HK90G508WSb4b/dY++SIoNYHw1/JHfk4aUFxv0kvEM0yLfLt6h+N tedlPF6eP6IHglmUP8/TFoS3Vvuu1de6ujrfw= Received: by 10.142.51.18 with SMTP id y18mr852550wfy.290.1293571500311; Tue, 28 Dec 2010 13:25:00 -0800 (PST) MIME-Version: 1.0 Received: by 10.142.173.9 with HTTP; Tue, 28 Dec 2010 13:24:39 -0800 (PST) From: Blue Swirl Date: Tue, 28 Dec 2010 21:24:39 +0000 Message-ID: To: pl@dlh.net, Stefan Hajnoczi , qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: Subject: [Qemu-devel] [PATCH] pc: move port 92 stuff back to pc.c from pckbd.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org 956a3e6bb7386de48b642d4fee11f7f86a2fcf9a introduced a bug concerning reset bit for port 92. Since the keyboard output port and port 92 are not compatible anyway, let's separate them. Reported-by: Peter Lieven Signed-off-by: Blue Swirl Acked-by: Andreas Färber --- hw/pc.c | 68 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- hw/pckbd.c | 19 +--------------- 2 files changed, 67 insertions(+), 20 deletions(-) KBDState *s = opaque; @@ -357,7 +345,7 @@ static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val) kbd_queue(s, val, 1); break; case KBD_CCMD_WRITE_OUTPORT: - ioport92_write(s, 0, val); + outport_write(s, 0, val); break; case KBD_CCMD_WRITE_MOUSE: ps2_write_mouse(s->mouse, val); @@ -489,9 +477,6 @@ static int i8042_initfn(ISADevice *dev) register_ioport_read(0x64, 1, 1, kbd_read_status, s); register_ioport_write(0x64, 1, 1, kbd_write_command, s); isa_init_ioport(dev, 0x64); - register_ioport_read(0x92, 1, 1, ioport92_read, s); - register_ioport_write(0x92, 1, 1, ioport92_write, s); - isa_init_ioport(dev, 0x92); s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); diff --git a/hw/pc.c b/hw/pc.c index 18a4a9f..e63b397 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -411,11 +411,71 @@ void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, qemu_register_reset(pc_cmos_init_late, &arg); } +/* port 92 stuff: could be split off */ +typedef struct Port92State { + ISADevice dev; + uint8_t outport; + qemu_irq *a20_out; +} Port92State; + +static void port92_write(void *opaque, uint32_t addr, uint32_t val) +{ + Port92State *s = opaque; + + DPRINTF("port92: write 0x%02x\n", val); + s->outport = val; + qemu_set_irq(*s->a20_out, (val >> 1) & 1); + if (val & 1) { + qemu_system_reset_request(); + } +} + +static uint32_t port92_read(void *opaque, uint32_t addr) +{ + Port92State *s = opaque; + uint32_t ret; + + ret = s->outport; + DPRINTF("port92: read 0x%02x\n", ret); + return ret; +} + +static void port92_init(ISADevice *dev, qemu_irq *a20_out) +{ + Port92State *s = DO_UPCAST(Port92State, dev, dev); + + s->a20_out = a20_out; +} + +static int port92_initfn(ISADevice *dev) +{ + Port92State *s = DO_UPCAST(Port92State, dev, dev); + + register_ioport_read(0x92, 1, 1, port92_read, s); + register_ioport_write(0x92, 1, 1, port92_write, s); + isa_init_ioport(dev, 0x92); + return 0; +} + +static ISADeviceInfo port92_info = { + .qdev.name = "port92", + .qdev.size = sizeof(Port92State), + .qdev.no_user = 1, + .init = port92_initfn, +}; + +static void port92_register(void) +{ + isa_qdev_register(&port92_info); +} +device_init(port92_register) + static void handle_a20_line_change(void *opaque, int irq, int level) { CPUState *cpu = opaque; /* XXX: send to all CPUs ? */ + /* XXX: add logic to handle multiple A20 line sources */ cpu_x86_set_a20(cpu, level); } @@ -1027,7 +1087,7 @@ void pc_basic_device_init(qemu_irq *isa_irq, PITState *pit; qemu_irq rtc_irq = NULL; qemu_irq *a20_line; - ISADevice *i8042; + ISADevice *i8042, *port92; qemu_irq *cpu_exit_irq; register_ioport_write(0x80, 1, 1, ioport80_write, NULL); @@ -1061,10 +1121,12 @@ void pc_basic_device_init(qemu_irq *isa_irq, } } - a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1); + a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); i8042 = isa_create_simple("i8042"); - i8042_setup_a20_line(i8042, a20_line); + i8042_setup_a20_line(i8042, &a20_line[0]); vmmouse_init(i8042); + port92 = isa_create_simple("port92"); + port92_init(port92, &a20_line[1]); cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1); DMA_init(0, cpu_exit_irq); diff --git a/hw/pckbd.c b/hw/pckbd.c index 863b485..958de0a 100644 --- a/hw/pckbd.c +++ b/hw/pckbd.c @@ -211,10 +211,8 @@ static void kbd_queue(KBDState *s, int b, int aux) ps2_queue(s->kbd, b); } -static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) +static void outport_write(KBDState *s, uint32_t addr, uint32_t val) { - KBDState *s = opaque; - DPRINTF("kbd: write outport=0x%02x\n", val); s->outport = val; if (s->a20_out) { @@ -225,16 +223,6 @@ static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) } } -static uint32_t ioport92_read(void *opaque, uint32_t addr) -{ - KBDState *s = opaque; - uint32_t ret; - - ret = s->outport; - DPRINTF("kbd: read outport=0x%02x\n", ret); - return ret; -} - static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) {