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[U-Boot,3/4] mips: bmips: add bcm63xx-hsspi driver support for BCM63268

Message ID 1495567120-24573-4-git-send-email-noltari@gmail.com
State Superseded, archived
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Álvaro Fernández Rojas May 23, 2017, 7:18 p.m. UTC 
This driver manages the high speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 arch/mips/dts/brcm,bcm63268.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

Comments

Simon Glass June 1, 2017, 3:10 a.m. UTC | #1 
On 23 May 2017 at 13:18, Álvaro Fernández Rojas <noltari@gmail.com> wrote:
> This driver manages the high speed SPI controller present on this SoC.
>
> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
> ---
>  arch/mips/dts/brcm,bcm63268.dtsi | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
>

Reviewed-by: Simon Glass <sjg@chromium.org>
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Patch

diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi
index 6e3d9c3..4d4e36c 100644
--- a/arch/mips/dts/brcm,bcm63268.dtsi
+++ b/arch/mips/dts/brcm,bcm63268.dtsi
@@ -15,6 +15,7 @@ 
 
 	aliases {
 		spi0 = &lsspi;
+		spi1 = &hsspi;
 	};
 
 	cpus {
@@ -44,6 +45,12 @@ 
 		#size-cells = <1>;
 		u-boot,dm-pre-reloc;
 
+		hsspi_pll: hsspi-pll {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <400000000>;
+		};
+
 		periph_osc: periph-osc {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
@@ -153,6 +160,20 @@ 
 			status = "disabled";
 		};
 
+		hsspi: spi@10001000 {
+			compatible = "brcm,bcm6328-hsspi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x10001000 0x600>;
+			clocks = <&periph_clk BCM63268_CLK_HSSPI>, <&hsspi_pll>;
+			clock-names = "hsspi", "pll";
+			resets = <&periph_rst BCM63268_RST_SPI>;
+			spi-max-frequency = <50000000>;
+			num-cs = <8>;
+
+			status = "disabled";
+		};
+
 		leds: led-controller@10001900 {
 			compatible = "brcm,bcm6328-leds";
 			reg = <0x10001900 0x24>;