@@ -75,7 +75,6 @@
#ifndef CONFIG_SPL_BUILD
#define CONFIG_CADENCE_QSPI
#define CONFIG_CQSPI_REF_CLK 384000000
-#define CONFIG_CQSPI_DECODER 0x0
#define CONFIG_BOUNCE_BUFFER
#endif
@@ -200,7 +200,6 @@ unsigned int cm_get_l4_sp_clk_hz(void);
unsigned int cm_get_qspi_controller_clk_hz(void);
#define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz()
#endif
-#define CONFIG_CQSPI_DECODER 0
#define CONFIG_BOUNCE_BUFFER
/*
@@ -68,7 +68,6 @@
+ * QSPI support
+ */
#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
-#define CONFIG_CQSPI_DECODER 0
#define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000
#define CONFIG_BOUNCE_BUFFER