diff mbox

[U-Boot] ARM: k2g: Fix passing main pll info for higher speeds

Message ID 20170520001927.2578-1-lokeshvutla@ti.com
State Accepted
Commit 9cb5eaf2cfb7ceb267fc10c743b69a57a1141bf7
Delegated to: Tom Rini
Headers show

Commit Message

Lokesh Vutla May 20, 2017, 12:19 a.m. UTC
Main pll is marked as arm plls for higher speeds. Fix this.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
 board/ti/ks2_evm/board_k2g.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Tom Rini June 6, 2017, 12:21 a.m. UTC | #1
On Sat, May 20, 2017 at 05:49:27AM +0530, Lokesh Vutla wrote:

> Main pll is marked as arm plls for higher speeds. Fix this.
> 
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

Applied to u-boot/master, thanks!
diff mbox

Patch

diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 21aec8f065..f0bd31d6f7 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -79,29 +79,29 @@  static struct pll_init_data main_pll_config[MAX_SYSCLK][NUM_SPDS] = {
 		[SPD400]	= {MAIN_PLL, 125, 3, 2},
 		[SPD600]	= {MAIN_PLL, 125, 2, 2},
 		[SPD800]	= {MAIN_PLL, 250, 3, 2},
-		[SPD900]	= {TETRIS_PLL, 187, 2, 2},
-		[SPD1000]	= {TETRIS_PLL, 104, 1, 2},
+		[SPD900]	= {MAIN_PLL, 187, 2, 2},
+		[SPD1000]	= {MAIN_PLL, 104, 1, 2},
 	},
 	[SYSCLK_24MHz] = {
 		[SPD400]	= {MAIN_PLL, 100, 3, 2},
 		[SPD600]	= {MAIN_PLL, 300, 6, 2},
 		[SPD800]	= {MAIN_PLL, 200, 3, 2},
-		[SPD900]	= {TETRIS_PLL, 75, 1, 2},
-		[SPD1000]	= {TETRIS_PLL, 250, 3, 2},
+		[SPD900]	= {MAIN_PLL, 75, 1, 2},
+		[SPD1000]	= {MAIN_PLL, 250, 3, 2},
 	},
 	[SYSCLK_25MHz] = {
 		[SPD400]	= {MAIN_PLL, 32, 1, 2},
 		[SPD600]	= {MAIN_PLL, 48, 1, 2},
 		[SPD800]	= {MAIN_PLL, 64, 1, 2},
-		[SPD900]	= {TETRIS_PLL, 72, 1, 2},
-		[SPD1000]	= {TETRIS_PLL, 80, 1, 2},
+		[SPD900]	= {MAIN_PLL, 72, 1, 2},
+		[SPD1000]	= {MAIN_PLL, 80, 1, 2},
 	},
 	[SYSCLK_26MHz] = {
 		[SPD400]	= {MAIN_PLL, 400, 13, 2},
 		[SPD600]	= {MAIN_PLL, 230, 5, 2},
 		[SPD800]	= {MAIN_PLL, 123, 2, 2},
-		[SPD900]	= {TETRIS_PLL, 69, 1, 2},
-		[SPD1000]	= {TETRIS_PLL, 384, 5, 2},
+		[SPD900]	= {MAIN_PLL, 69, 1, 2},
+		[SPD1000]	= {MAIN_PLL, 384, 5, 2},
 	},
 };