From patchwork Wed Dec 22 15:11:11 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [commit,spu] Fix (latent) ICE in spu_expand_mov Date: Wed, 22 Dec 2010 05:11:11 -0000 From: Ulrich Weigand X-Patchwork-Id: 76418 Message-Id: <201012221511.oBMFBBh9015886@d06av02.portsmouth.uk.ibm.com> To: gcc-patches@sourceware.org Hello, in a compiler build with Tom de Vries' new sign/zero extension elimination pass added (http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01529.html), I'm seeing frequent internal compiler errors on the SPU. The reason is that this new pass frequently generates move instructions whose destination is a sub-word lowpart subreg. Now the problem on the SPU is some of those subregs are not directly valid (e.g. a SImode lowpart of a DImode value cannot be implemented by just reinterpreting register contents, but requires an actual shift due to the way values are laid out in the 16-bit SPU registers). The SPU move expander attempts to rewrite moves to eliminate such invalid subregs. However, it expects them to occur only on the *source* of a move, never the destination. Interestingly enough, this apparently never happens in a compiler without the extension elimination pass. On the other hand, such move instructions seem to be valid RTL as far as I can see from the docs, so the SPU back- end really ought to support them ... The following patch fixes this problem by having the move expander simply remove the subreg and perform the move in the inner mode. This fixes the ICEs with the extension elimination pass. Tested with no regressions on spu-elf. Committed to mainline. Bye, Ulrich ChangeLog: * config/spu/spu.md ("mov"): Use nonimmediate_operand predicate for destination operand. * config/spu/spu.c (spu_expand_mov): If move destination is an invalid subreg, perform move in the subreg's inner mode instead. diff -urp gcc/config/spu.orig/spu.c gcc/config/spu/spu.c --- gcc/config/spu.orig/spu.c 2010-12-10 16:51:16.000000000 +0100 +++ gcc/config/spu/spu.c 2010-12-21 16:49:02.000000000 +0100 @@ -4572,7 +4572,13 @@ int spu_expand_mov (rtx * ops, enum machine_mode mode) { if (GET_CODE (ops[0]) == SUBREG && !valid_subreg (ops[0])) - abort (); + { + /* Perform the move in the destination SUBREG's inner mode. */ + ops[0] = SUBREG_REG (ops[0]); + mode = GET_MODE (ops[0]); + ops[1] = gen_lowpart_common (mode, ops[1]); + gcc_assert (ops[1]); + } if (GET_CODE (ops[1]) == SUBREG && !valid_subreg (ops[1])) { diff -urp gcc/config/spu.orig/spu.md gcc/config/spu/spu.md --- gcc/config/spu.orig/spu.md 2010-12-10 16:51:16.000000000 +0100 +++ gcc/config/spu/spu.md 2010-12-21 16:57:27.000000000 +0100 @@ -269,8 +269,8 @@ ;; mov (define_expand "mov" - [(set (match_operand:ALL 0 "spu_nonimm_operand" "=r,r,r,m") - (match_operand:ALL 1 "general_operand" "r,i,m,r"))] + [(set (match_operand:ALL 0 "nonimmediate_operand" "") + (match_operand:ALL 1 "general_operand" ""))] "" { if (spu_expand_mov(operands, mode))