Patchwork [U-Boot,1/8] arm: make default implementation of cache_flush() weakly linked

login
register
mail settings
Submitter Aneesh V
Date Dec. 22, 2010, 11:54 a.m.
Message ID <1293018898-13253-2-git-send-email-aneesh@ti.com>
Download mbox | patch
Permalink /patch/76388/
State Changes Requested
Delegated to: Albert ARIBAUD
Headers show

Comments

Aneesh V - Dec. 22, 2010, 11:54 a.m.
make default implementation of cache_flush() weakly linked so that
sub-architectures can override it

Signed-off-by: Aneesh V <aneesh@ti.com>
---
 arch/arm/lib/cache.c |    9 +++------
 1 files changed, 3 insertions(+), 6 deletions(-)
Albert ARIBAUD - Jan. 8, 2011, 6:40 a.m.
Le 22/12/2010 12:54, Aneesh V a écrit :
> make default implementation of cache_flush() weakly linked so that
> sub-architectures can override it
>
> Signed-off-by: Aneesh V<aneesh@ti.com>

Acked-by: Albert Aribaud <albert.aribaud@free.fr>

Amicalement,

Patch

diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 30686fe..275b6e1 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -25,7 +25,7 @@ 
 
 #include <common.h>
 
-void  flush_cache (unsigned long dummy1, unsigned long dummy2)
+void  __flush_cache(unsigned long dummy1, unsigned long dummy2)
 {
 #if defined(CONFIG_OMAP2420) || defined(CONFIG_ARM1136)
 	void arm1136_cache_flush(void);
@@ -38,10 +38,7 @@  void  flush_cache (unsigned long dummy1, unsigned long dummy2)
 	/* disable write buffer as well (page 2-22) */
 	asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0));
 #endif
-#ifdef CONFIG_OMAP34XX
-	void v7_flush_cache_all(void);
-
-	v7_flush_cache_all();
-#endif
 	return;
 }
+void  flush_cache(unsigned long dummy1, unsigned long dummy2)
+	__attribute__((weak, alias("__flush_cache")));