@@ -1568,7 +1568,8 @@ do { \
On Niagara-2 and Niagara-3, a not-taken branch costs 1 cycle whereas
a taken branch costs 6 cycles.
- The T4 Supplement specifies the branch latency at 2 cycles. */
+ The T4 Supplement specifies the branch latency at 2 cycles.
+ The M7 Supplement specifies the branch latency at 1 cycle. */
#define BRANCH_COST(speed_p, predictable_p) \
((sparc_cpu == PROCESSOR_V9 \
@@ -1583,7 +1584,9 @@ do { \
? 5 \
: (sparc_cpu == PROCESSOR_NIAGARA4 \
? 2 \
- : 3)))))
+ : (sparc_cpu == PROCESSOR_NIAGARA7 \
+ ? 1 \
+ : 3))))))
/* Control the assembler format that we output. */