| Message ID | 1494992688-19180-5-git-send-email-kever.yang@rock-chips.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Simon Glass |
| Headers | show |
On 16 May 2017 at 21:44, Kever Yang <kever.yang@rock-chips.com> wrote: > SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may > be high active or low active, the dwmmc driver always assume > the sdmmc-pwren as high active. > > Kernel treat this pin as fixed regulator instead of a pin from > controller, and then it can set in dts file upon board schematic, > that's a good solution, we can also do this in u-boot. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) Acked-by: Simon Glass <sjg@chromium.org>
Hi Kever, On 19 May 2017 at 20:29, Simon Glass <sjg@chromium.org> wrote: > On 16 May 2017 at 21:44, Kever Yang <kever.yang@rock-chips.com> wrote: >> SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may >> be high active or low active, the dwmmc driver always assume >> the sdmmc-pwren as high active. >> >> Kernel treat this pin as fixed regulator instead of a pin from >> controller, and then it can set in dts file upon board schematic, >> that's a good solution, we can also do this in u-boot. >> >> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> >> --- >> >> drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++---- >> 1 file changed, 2 insertions(+), 4 deletions(-) > > Acked-by: Simon Glass <sjg@chromium.org> Can you please rebase this patch and the following ones? I have marked them as 'changes requested' in patchwork. Regards, Simon
diff --git a/drivers/pinctrl/rockchip/pinctrl_rk3328.c b/drivers/pinctrl/rockchip/pinctrl_rk3328.c index 716d02a..0995d9f 100644 --- a/drivers/pinctrl/rockchip/pinctrl_rk3328.c +++ b/drivers/pinctrl/rockchip/pinctrl_rk3328.c @@ -184,13 +184,11 @@ static void pinctrl_rk3328_sdmmc_config(struct rk3328_grf_regs *grf, if (com_iomux & IOMUX_SEL_SDMMC_MASK) rk_clrsetreg(&grf->gpio0d_iomux, GPIO0D6_SEL_MASK, - GPIO0D6_SDMMC0_PWRENM1 - << GPIO0D6_SEL_SHIFT); + GPIO0D6_GPIO << GPIO0D6_SEL_SHIFT); else rk_clrsetreg(&grf->gpio2a_iomux, GPIO2A7_SEL_MASK, - GPIO2A7_SDMMC0_PWRENM0 - << GPIO2A7_SEL_SHIFT); + GPIO2A7_GPIO << GPIO2A7_SEL_SHIFT); rk_clrsetreg(&grf->gpio1a_iomux, GPIO1A0_SEL_MASK, GPIO1A0_CARD_DATA_CLK_CMD_DETN
SDMMC-PWREN is a pin to control voltage for SDMMC IO, it may be high active or low active, the dwmmc driver always assume the sdmmc-pwren as high active. Kernel treat this pin as fixed regulator instead of a pin from controller, and then it can set in dts file upon board schematic, that's a good solution, we can also do this in u-boot. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- drivers/pinctrl/rockchip/pinctrl_rk3328.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)