diff mbox

[i386] : Use Ym and Yn constraints in Simode interunit moves

Message ID CAFULd4Y2ggvUw6PkYDzmG_D0=_Jx1bD4NcXXp16OT7X=QsFgQQ@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak May 16, 2017, 2:57 p.m. UTC
Hello!

2017-05-16  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386.i386.md (*movsi_internal): Split (?rm,*y) alternative
    to (?r,*Yn) and (?m,*y) alternatives, and (?*y,rm) to (?*Ym,r)
    and (?*y,m).  Update insn attributes.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.
diff mbox

Patch

Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 248070)
+++ config/i386/i386.md	(working copy)
@@ -2328,9 +2328,9 @@ 
 
 (define_insn "*movsi_internal"
   [(set (match_operand:SI 0 "nonimmediate_operand"
-			"=r,m ,*y,*y,?rm,?*y,*v,*v,*v,m ,?r ,?r,?*Yi,*k,*k ,*rm")
+    "=r,m ,*y,*y,?*y,?m,?r ,?*Ym,*v,*v,*v,m ,?r ,?r,?*Yi,*k,*k ,*rm")
 	(match_operand:SI 1 "general_operand"
-			"g ,re,C ,*y,*y ,rm ,C ,*v,m ,*v,*Yj,*v,r   ,*r,*km,*k"))]
+    "g ,re,C ,*y,m  ,*y,*Yn,r   ,C ,*v,m ,*v,*Yj,*v,r   ,*r,*km,*k"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))"
 {
   switch (get_attr_type (insn))
@@ -2395,19 +2395,19 @@ 
     }
 }
   [(set (attr "isa")
-     (if_then_else (eq_attr "alternative" "11")
+     (if_then_else (eq_attr "alternative" "13")
        (const_string "sse4")
        (const_string "*")))
    (set (attr "type")
      (cond [(eq_attr "alternative" "2")
 	      (const_string "mmx")
-	    (eq_attr "alternative" "3,4,5")
+	    (eq_attr "alternative" "3,4,5,6,7")
 	      (const_string "mmxmov")
-	    (eq_attr "alternative" "6,11")
+	    (eq_attr "alternative" "8,13")
 	      (const_string "sselog1")
-	    (eq_attr "alternative" "7,8,9,10,12")
+	    (eq_attr "alternative" "9,10,11,12,14")
 	      (const_string "ssemov")
-	    (eq_attr "alternative" "13,14,15")
+	    (eq_attr "alternative" "15,16,17")
 	      (const_string "mskmov")
 	    (and (match_operand 0 "register_operand")
 		 (match_operand 1 "pic_32bit_operand"))
@@ -2415,11 +2415,11 @@ 
 	   ]
 	   (const_string "imov")))
    (set (attr "length_immediate")
-     (if_then_else (eq_attr "alternative" "11")
+     (if_then_else (eq_attr "alternative" "13")
        (const_string "1")
        (const_string "*")))
    (set (attr "prefix_extra")
-     (if_then_else (eq_attr "alternative" "11")
+     (if_then_else (eq_attr "alternative" "13")
        (const_string "1")
        (const_string "*")))
    (set (attr "prefix")
@@ -2433,7 +2433,7 @@ 
    (set (attr "mode")
      (cond [(eq_attr "alternative" "2,3")
 	      (const_string "DI")
-	    (eq_attr "alternative" "6,7")
+	    (eq_attr "alternative" "8,9")
 	      (cond [(ior (match_operand 0 "ext_sse_reg_operand")
 			  (match_operand 1 "ext_sse_reg_operand"))
 		       (const_string "XI")
@@ -2447,10 +2447,10 @@ 
 		    ]
 		    (const_string "TI"))
 
-	    (and (eq_attr "alternative" "8,9")
+	    (and (eq_attr "alternative" "10,11")
 	         (not (match_test "TARGET_SSE2")))
 	      (const_string "SF")
-	    (eq_attr "alternative" "11")
+	    (eq_attr "alternative" "13")
 	      (const_string "TI")
 	   ]
 	   (const_string "SI")))])