Patchwork [U-Boot,v2] microblaze: Disabling interrupt should return 1 if was enabled

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Submitter Michal Simek
Date Dec. 21, 2010, 1:02 p.m.
Message ID <1292936565-24677-1-git-send-email-monstr@monstr.eu>
Download mbox | patch
Permalink /patch/76290/
State Accepted
Delegated to: Michal Simek
Headers show

Comments

Michal Simek - Dec. 21, 2010, 1:02 p.m.
Microblaze implement enable/disable interrupts through MSR
that's why disable_interrupts function should return 1 when interrupt
was enabled. Return 0 when interrupt was disabled.

Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
---
 arch/microblaze/cpu/interrupts.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)
Sergei Shtylyov - Dec. 21, 2010, 1:26 p.m.
Hello.

On 21-12-2010 16:02, Michal Simek wrote:

> Microblaze implement enable/disable interrupts through MSR
> that's why disable_interrupts function should return 1 when interrupt
> was enabled. Return 0 when interrupt was disabled.

> Signed-off-by: John Linn<john.linn@xilinx.com>
> Signed-off-by: Michal Simek<monstr@monstr.eu>
[...]

> diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
> index e9d53c1..054e09f 100644
> --- a/arch/microblaze/cpu/interrupts.c
> +++ b/arch/microblaze/cpu/interrupts.c
> @@ -41,8 +41,10 @@ void enable_interrupts (void)
>
>   int disable_interrupts (void)
>   {
> +	unsigned int msr;

    Empty line wouldn't hurt here...

> +	MFS(msr, rmsr);
>   	MSRCLR(0x2);
> -	return 0;
> +	return ((msr & 0x2) != 0);

    External pair of () not needed.

WBR, Sergei
Wolfgang Denk - Dec. 21, 2010, 1:49 p.m.
Dear Michal Simek,

In message <1292936565-24677-1-git-send-email-monstr@monstr.eu> you wrote:
> Microblaze implement enable/disable interrupts through MSR
> that's why disable_interrupts function should return 1 when interrupt
> was enabled. Return 0 when interrupt was disabled.
> 
> Signed-off-by: John Linn <john.linn@xilinx.com>
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> ---
>  arch/microblaze/cpu/interrupts.c |    4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)

Acked-by: Wolfgang Denk <wd@denx.de>

Best regards,

Wolfgang Denk
于会 - Dec. 21, 2010, 2:45 p.m.
Dear Wolfgang Denk,
 
    I'm Abraham Yu, here is my first time write to you, I feel so happy to join the U-Boot team.
 
I was porting arm926ejs SoC to our new SoC call "AVT2210", OK! Here is some basically questions below:
(u-boot.1010.12.rc2 is what I am using.)
 
1). First, I am useing JTAG to download image to SDRAM, base address 0x40000000, (32M) so I confused with
     "CONFIG_SYS_TEXT_BASE", I think this this the relocate address, I am right? Could you please help
     me choose a address for me can working. (I choose 0x41F00000, at last crash on relocate: copy_loop)
 
2). Second, CONFIG_SYS_INIT_SP_ADDR address is also obscure, I choose 0x42000000, at last crash on relocate: copy_loop)
 
3). What other thing I should do?
 
Thanks very much, God bless you.
 
Abraham
Wolfgang Denk - Dec. 21, 2010, 3:10 p.m.
Dear =?GBK?B?09q74Q==?=,

Please do not hijack existing mail threads!! 

Start a new thread, and make sure to chose a proper subject.

Please make sure to use a line length of 70 characters or so.

And never post HTML to that list.

In message <7eb125f4.fad0.12d0964185c.Coremail.henrybenyu@163.com> you wrote:
>
>  
> 1). First, I am useing JTAG to download image to SDRAM, base address 0x40000000, (32M) so I confused with
>      "CONFIG_SYS_TEXT_BASE", I think this this the relocate address, I am right? Could you please help
>      me choose a address for me can working. (I choose 0x41F00000, at last crash on relocate: copy_loop)

No, CONFIG_SYS_TEXT_BASE is NOT the relocation address. The relocation
address gets dynamically computed and may vary.  CONFIG_SYS_TEXT_BASE
is the base address of the text segment when linking the U-Boot
image.

> 2). Second, CONFIG_SYS_INIT_SP_ADDR address is also obscure, I choose 0x42000000, at last crash on relocate: copy_loop)

As the name attempts to suggest, CONFIG_SYS_INIT_SP_ADDR defines the
address of the initial steck pointer in the restricted C runtime
environment before relocation.

> 3). What other thing I should do?

Read the documentation and especially existing code for other, similar
boards.

Best regards,

Wolfgang Denk
Wolfgang Denk - Jan. 9, 2011, 9:27 p.m.
Dear Michal Simek,

In message <1292936565-24677-1-git-send-email-monstr@monstr.eu> you wrote:
> Microblaze implement enable/disable interrupts through MSR
> that's why disable_interrupts function should return 1 when interrupt
> was enabled. Return 0 when interrupt was disabled.
> 
> Signed-off-by: John Linn <john.linn@xilinx.com>
> Signed-off-by: Michal Simek <monstr@monstr.eu>
> ---
>  arch/microblaze/cpu/interrupts.c |    4 +++-
>  1 files changed, 3 insertions(+), 1 deletions(-)

Acked-by: Wolfgang Denk <wd@denx.de>

Best regards,

Wolfgang Denk

Patch

diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index e9d53c1..054e09f 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -41,8 +41,10 @@  void enable_interrupts (void)
 
 int disable_interrupts (void)
 {
+	unsigned int msr;
+	MFS(msr, rmsr);
 	MSRCLR(0x2);
-	return 0;
+	return ((msr & 0x2) != 0);
 }
 
 #ifdef CONFIG_SYS_INTC_0