From patchwork Sat May 13 17:43:18 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 762054 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wQDkP0X0hz9s9c for ; Sun, 14 May 2017 03:44:45 +1000 (AEST) Received: from localhost ([::1]:58416 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9b5u-00009o-K6 for incoming@patchwork.ozlabs.org; Sat, 13 May 2017 13:44:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57585) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9b52-0008HH-ON for qemu-devel@nongnu.org; Sat, 13 May 2017 13:43:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9b51-0003yJ-Kn for qemu-devel@nongnu.org; Sat, 13 May 2017 13:43:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53926) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d9b4z-0003uL-1p; Sat, 13 May 2017 13:43:45 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D19336197E; Sat, 13 May 2017 17:43:43 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D19336197E Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=eric.auger@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D19336197E Received: from localhost.localdomain.com (ovpn-116-214.ams2.redhat.com [10.36.116.214]) by smtp.corp.redhat.com (Postfix) with ESMTP id EA3CAD0210; Sat, 13 May 2017 17:43:40 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org, edgar.iglesias@gmail.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org, prem.mallappa@gmail.com Date: Sat, 13 May 2017 19:43:18 +0200 Message-Id: <1494697399-352-5-git-send-email-eric.auger@redhat.com> In-Reply-To: <1494697399-352-1-git-send-email-eric.auger@redhat.com> References: <1494697399-352-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Sat, 13 May 2017 17:43:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v4 4/5] hw/arm/virt: Add 2.10 machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mohun106@gmail.com, drjones@redhat.com, tcain@qti.qualcomm.com, Radha.Chintakuntla@cavium.com, Sunil.Goutham@cavium.com, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The new machine type allows smmuv3 instantiation. A new option is introduced to turn the feature on/off (off by default). Signed-off-by: Eric Auger --- Another alternative would be to use the -device option as done on x86. As the smmu is a sysbus device, we would need to use the platform bus framework. This would work fine for the dt generation. However the feasibility needs to be studied for ACPI table generation. a Veuillez saisir le message de validation pour vos modifications. Les lignes --- hw/arm/virt.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++-- include/hw/arm/virt.h | 1 + 2 files changed, 50 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c00efb2..71ea707 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1496,6 +1496,20 @@ static void machvirt_init(MachineState *machine) create_platform_bus(vms, pic); } +static bool virt_get_smmu(Object *obj, Error **errp) +{ + VirtMachineState *vms = VIRT_MACHINE(obj); + + return vms->smmu; +} + +static void virt_set_smmu(Object *obj, bool value, Error **errp) +{ + VirtMachineState *vms = VIRT_MACHINE(obj); + + vms->smmu = value; +} + static bool virt_get_secure(Object *obj, Error **errp) { VirtMachineState *vms = VIRT_MACHINE(obj); @@ -1609,7 +1623,7 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); -static void virt_2_9_instance_init(Object *obj) +static void virt_2_10_instance_init(Object *obj) { VirtMachineState *vms = VIRT_MACHINE(obj); VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms); @@ -1665,14 +1679,47 @@ static void virt_2_9_instance_init(Object *obj) NULL); } + if (vmc->no_smmu) { + vms->smmu = false; + } else { + /* Default disallows smmu instantiation */ + vms->smmu = false; + object_property_add_bool(obj, "smmu", virt_get_smmu, + virt_set_smmu, NULL); + object_property_set_description(obj, "smmu", + "Set on/off to enable/disable " + "smmu instantiation (default off)", + NULL); + } + vms->memmap = a15memmap; vms->irqmap = a15irqmap; } +static void virt_machine_2_10_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(2, 10) + +#define VIRT_COMPAT_2_9 \ + HW_COMPAT_2_9 + +static void virt_2_9_instance_init(Object *obj) +{ + virt_2_10_instance_init(obj); +} + static void virt_machine_2_9_options(MachineClass *mc) { + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + + virt_machine_2_10_options(mc); + SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_9); + + vmc->no_smmu = true; } -DEFINE_VIRT_MACHINE_AS_LATEST(2, 9) +DEFINE_VIRT_MACHINE(2, 9) + #define VIRT_COMPAT_2_8 \ HW_COMPAT_2_8 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 164a531..cd2c82e 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -86,6 +86,7 @@ typedef struct { bool disallow_affinity_adjustment; bool no_its; bool no_pmu; + bool no_smmu; bool claim_edge_triggered_timers; } VirtMachineClass;