diff mbox

[U-Boot,V3,1/4] mmc: fsl_esdhc: introduce vs18_enable for 1.8V fix I/O

Message ID 1494469706-22574-1-git-send-email-peng.fan@nxp.com
State Superseded
Delegated to: Stefano Babic
Headers show

Commit Message

Peng Fan May 11, 2017, 2:28 a.m. UTC
When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
the USDHC controller when init.

This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
structure and priv data, so each controller can have different
settings.

We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
that it will apply to all USDHC controllers and it only set the 1.8V
at init phase. So if user does not select to the eMMC device,
the voltage on the I/O pins are not correct.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---

V3: none
V2: none

 drivers/mmc/fsl_esdhc.c | 9 +++++++++
 include/fsl_esdhc.h     | 1 +
 2 files changed, 10 insertions(+)

Comments

Jaehoon Chung May 25, 2017, 1:34 p.m. UTC | #1
On 05/11/2017 11:28 AM, Peng Fan wrote:
> When using eMMC with 1.8V I/O, the VSELECT bit need to be set in
> the USDHC controller when init.
> 
> This patch adds a parameter "vs18_enable" in fsl_esdhc_cfg
> structure and priv data, so each controller can have different
> settings.
> 
> We could not use CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT, it has problem
> that it will apply to all USDHC controllers and it only set the 1.8V
> at init phase. So if user does not select to the eMMC device,
> the voltage on the I/O pins are not correct.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Cc: Jaehoon Chung <jh80.chung@samsung.com>
> Cc: York Sun <york.sun@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> 
> V3: none
> V2: none
> 
>  drivers/mmc/fsl_esdhc.c | 9 +++++++++
>  include/fsl_esdhc.h     | 1 +
>  2 files changed, 10 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index f3c6358..bddfe24 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -92,6 +92,7 @@ struct fsl_esdhc {
>   * @dev: pointer for the device
>   * @non_removable: 0: removable; 1: non-removable
>   * @wp_enable: 1: enable checking wp; 0: no check
> + * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
>   * @cd_gpio: gpio for card detection
>   * @wp_gpio: gpio for write protection
>   */
> @@ -104,6 +105,7 @@ struct fsl_esdhc_priv {
>  	struct udevice *dev;
>  	int non_removable;
>  	int wp_enable;
> +	int vs18_enable;
>  #ifdef CONFIG_DM_GPIO
>  	struct gpio_desc cd_gpio;
>  	struct gpio_desc wp_gpio;
> @@ -673,6 +675,9 @@ static int esdhc_init(struct mmc *mmc)
>  	esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
>  #endif
>  
> +	if (priv->vs18_enable)
> +		esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
> +
>  	return 0;
>  }
>  
> @@ -733,6 +738,7 @@ static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg,
>  	priv->bus_width = cfg->max_bus_width;
>  	priv->sdhc_clk = cfg->sdhc_clk;
>  	priv->wp_enable  = cfg->wp_enable;
> +	priv->vs18_enable  = cfg->vs18_enable;

cfg->vs18_enable is u8, but priv->vs18_enable is int..

>  
>  	return 0;
>  };
> @@ -759,6 +765,9 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)
>  			VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN);
>  #endif
>  
> +	if (priv->vs18_enable)
> +		esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
> +
>  	writel(SDHCI_IRQ_EN_BITS, &regs->irqstaten);
>  	memset(&priv->cfg, 0, sizeof(priv->cfg));
>  
> diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
> index e15d3ae..7a5d653 100644
> --- a/include/fsl_esdhc.h
> +++ b/include/fsl_esdhc.h
> @@ -178,6 +178,7 @@ struct fsl_esdhc_cfg {
>  	u32	sdhc_clk;
>  	u8	max_bus_width;
>  	u8	wp_enable;
> +	u8	vs18_enable; /* Use 1.8V if set to 1 */
>  	struct mmc_config cfg;
>  };
>  
>
diff mbox

Patch

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index f3c6358..bddfe24 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -92,6 +92,7 @@  struct fsl_esdhc {
  * @dev: pointer for the device
  * @non_removable: 0: removable; 1: non-removable
  * @wp_enable: 1: enable checking wp; 0: no check
+ * @vs18_enable: 1: use 1.8V voltage; 0: use 3.3V
  * @cd_gpio: gpio for card detection
  * @wp_gpio: gpio for write protection
  */
@@ -104,6 +105,7 @@  struct fsl_esdhc_priv {
 	struct udevice *dev;
 	int non_removable;
 	int wp_enable;
+	int vs18_enable;
 #ifdef CONFIG_DM_GPIO
 	struct gpio_desc cd_gpio;
 	struct gpio_desc wp_gpio;
@@ -673,6 +675,9 @@  static int esdhc_init(struct mmc *mmc)
 	esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
 #endif
 
+	if (priv->vs18_enable)
+		esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
+
 	return 0;
 }
 
@@ -733,6 +738,7 @@  static int fsl_esdhc_cfg_to_priv(struct fsl_esdhc_cfg *cfg,
 	priv->bus_width = cfg->max_bus_width;
 	priv->sdhc_clk = cfg->sdhc_clk;
 	priv->wp_enable  = cfg->wp_enable;
+	priv->vs18_enable  = cfg->vs18_enable;
 
 	return 0;
 };
@@ -759,6 +765,9 @@  static int fsl_esdhc_init(struct fsl_esdhc_priv *priv)
 			VENDORSPEC_HCKEN | VENDORSPEC_IPGEN | VENDORSPEC_CKEN);
 #endif
 
+	if (priv->vs18_enable)
+		esdhc_setbits32(&regs->vendorspec, ESDHC_VENDORSPEC_VSELECT);
+
 	writel(SDHCI_IRQ_EN_BITS, &regs->irqstaten);
 	memset(&priv->cfg, 0, sizeof(priv->cfg));
 
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index e15d3ae..7a5d653 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -178,6 +178,7 @@  struct fsl_esdhc_cfg {
 	u32	sdhc_clk;
 	u8	max_bus_width;
 	u8	wp_enable;
+	u8	vs18_enable; /* Use 1.8V if set to 1 */
 	struct mmc_config cfg;
 };