diff mbox

[U-Boot,2/3] sunxi: Add clock support for TV encoder

Message ID 20170510164630.22775-3-jernej.skrabec@siol.net
State Accepted
Delegated to: Anatolij Gustschin
Headers show

Commit Message

Jernej Škrabec May 10, 2017, 4:46 p.m. UTC
This patch adds support for TV encoder clocks which will be used later.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---

 arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Comments

Maxime Ripard May 12, 2017, 3:47 p.m. UTC | #1
Hi Jernej,

On Wed, May 10, 2017 at 06:46:29PM +0200, Jernej Skrabec wrote:
> This patch adds support for TV encoder clocks which will be used later.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
> 
>  arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> index a44ea77576..dc011cc964 100644
> --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> @@ -83,7 +83,8 @@ struct sunxi_ccm_reg {
>  	u32 lcd0_ch0_clk_cfg;	/* 0x118 LCD0 CH0 module clock */
>  	u32 lcd1_ch0_clk_cfg;	/* 0x11c LCD1 CH0 module clock */
>  #endif
> -	u32 reserved14[3];
> +	u32 tve_clk_cfg;	/* 0x120 TVE module clock */
> +	u32 reserved14[2];

Maybe we should protect that with a comment, or an ifdef, that this is
only for the H3-generation SoCs?

Maxime
Jernej Škrabec May 12, 2017, 4:55 p.m. UTC | #2
Hi Maxime,

Dne petek, 12. maj 2017 ob 17:47:17 CEST je Maxime Ripard napisal(a):
> Hi Jernej,
> 
> On Wed, May 10, 2017 at 06:46:29PM +0200, Jernej Skrabec wrote:
> > This patch adds support for TV encoder clocks which will be used later.
> > 
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> > ---
> > 
> >  arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> > 
> > diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> > b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index
> > a44ea77576..dc011cc964 100644
> > --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> > +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> > @@ -83,7 +83,8 @@ struct sunxi_ccm_reg {
> > 
> >  	u32 lcd0_ch0_clk_cfg;	/* 0x118 LCD0 CH0 module clock */
> >  	u32 lcd1_ch0_clk_cfg;	/* 0x11c LCD1 CH0 module clock */
> >  
> >  #endif
> > 
> > -	u32 reserved14[3];
> > +	u32 tve_clk_cfg;	/* 0x120 TVE module clock */
> > +	u32 reserved14[2];
> 
> Maybe we should protect that with a comment, or an ifdef, that this is
> only for the H3-generation SoCs?

I vote for extending the comment, like: 
/* 0x120 H3/H5 TVE module clock */

Would that be ok?

Best regards,
Jernej
Maxime Ripard May 12, 2017, 8:27 p.m. UTC | #3
On Fri, May 12, 2017 at 06:55:56PM +0200, Jernej Škrabec wrote:
> Hi Maxime,
> 
> Dne petek, 12. maj 2017 ob 17:47:17 CEST je Maxime Ripard napisal(a):
> > Hi Jernej,
> > 
> > On Wed, May 10, 2017 at 06:46:29PM +0200, Jernej Skrabec wrote:
> > > This patch adds support for TV encoder clocks which will be used later.
> > > 
> > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> > > ---
> > > 
> > >  arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 8 +++++++-
> > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> > > b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index
> > > a44ea77576..dc011cc964 100644
> > > --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> > > +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
> > > @@ -83,7 +83,8 @@ struct sunxi_ccm_reg {
> > > 
> > >  	u32 lcd0_ch0_clk_cfg;	/* 0x118 LCD0 CH0 module clock */
> > >  	u32 lcd1_ch0_clk_cfg;	/* 0x11c LCD1 CH0 module clock */
> > >  
> > >  #endif
> > > 
> > > -	u32 reserved14[3];
> > > +	u32 tve_clk_cfg;	/* 0x120 TVE module clock */
> > > +	u32 reserved14[2];
> > 
> > Maybe we should protect that with a comment, or an ifdef, that this is
> > only for the H3-generation SoCs?
> 
> I vote for extending the comment, like: 
> /* 0x120 H3/H5 TVE module clock */
> 
> Would that be ok?

That works, thanks!
Maxime
Anatolij Gustschin May 15, 2017, 7:25 p.m. UTC | #4
On Wed, 10 May 2017 18:46:29 +0200
Jernej Skrabec jernej.skrabec@siol.net wrote:

> This patch adds support for TV encoder clocks which will be used later.
> 
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> ---
> 
>  arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)

applied to u-boot-video/master, with comment extended as discussed.
Thanks!

--
Anatolij
diff mbox

Patch

diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
index a44ea77576..dc011cc964 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
@@ -83,7 +83,8 @@  struct sunxi_ccm_reg {
 	u32 lcd0_ch0_clk_cfg;	/* 0x118 LCD0 CH0 module clock */
 	u32 lcd1_ch0_clk_cfg;	/* 0x11c LCD1 CH0 module clock */
 #endif
-	u32 reserved14[3];
+	u32 tve_clk_cfg;	/* 0x120 TVE module clock */
+	u32 reserved14[2];
 	u32 lcd0_ch1_clk_cfg;	/* 0x12c LCD0 CH1 module clock */
 	u32 lcd1_ch1_clk_cfg;	/* 0x130 LCD1 CH1 module clock */
 	u32 csi0_clk_cfg;	/* 0x134 CSI0 module clock */
@@ -299,6 +300,7 @@  struct sunxi_ccm_reg {
 #define AHB_GATE_OFFSET_DE_BE0		12
 #define AHB_GATE_OFFSET_DE		12
 #define AHB_GATE_OFFSET_HDMI		11
+#define AHB_GATE_OFFSET_TVE		9
 #ifndef CONFIG_SUNXI_DE2
 #define AHB_GATE_OFFSET_LCD1		5
 #define AHB_GATE_OFFSET_LCD0		4
@@ -404,6 +406,9 @@  struct sunxi_ccm_reg {
 
 #define CCM_HDMI_SLOW_CTRL_DDC_GATE	(1 << 31)
 
+#define CCM_TVE_CTRL_GATE		(0x1 << 31)
+#define CCM_TVE_CTRL_M(n)		((((n) - 1) & 0xf) << 0)
+
 #if defined(CONFIG_MACH_SUN50I)
 #define MBUS_CLK_DEFAULT		0x81000002 /* PLL6x2 / 3 */
 #elif defined(CONFIG_MACH_SUN8I)
@@ -434,6 +439,7 @@  struct sunxi_ccm_reg {
 #define AHB_RESET_OFFSET_DE		12
 #define AHB_RESET_OFFSET_HDMI		11
 #define AHB_RESET_OFFSET_HDMI2		10
+#define AHB_RESET_OFFSET_TVE		9
 #ifndef CONFIG_SUNXI_DE2
 #define AHB_RESET_OFFSET_LCD1		5
 #define AHB_RESET_OFFSET_LCD0		4