From patchwork Fri Dec 17 23:50:52 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kumar Gala X-Patchwork-Id: 76040 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1431BB6EF2 for ; Sat, 18 Dec 2010 10:54:01 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0F95C282D5; Sat, 18 Dec 2010 00:52:45 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8KgVLadGuzrb; Sat, 18 Dec 2010 00:52:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 695D528252; Sat, 18 Dec 2010 00:51:52 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 92187281CA for ; Sat, 18 Dec 2010 00:51:47 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Os-ao-UaRtHW for ; Sat, 18 Dec 2010 00:51:47 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by theia.denx.de (Postfix) with ESMTPS id 04D1F281C5 for ; Sat, 18 Dec 2010 00:51:12 +0100 (CET) Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id oBHNp6aC012766; Fri, 17 Dec 2010 17:51:06 -0600 From: Kumar Gala To: u-boot@lists.denx.de Date: Fri, 17 Dec 2010 17:50:52 -0600 Message-Id: <1292629858-10233-9-git-send-email-galak@kernel.crashing.org> X-Mailer: git-send-email 1.6.0.6 In-Reply-To: <1292629858-10233-8-git-send-email-galak@kernel.crashing.org> References: <1292629858-10233-1-git-send-email-galak@kernel.crashing.org> <1292629858-10233-2-git-send-email-galak@kernel.crashing.org> <1292629858-10233-3-git-send-email-galak@kernel.crashing.org> <1292629858-10233-4-git-send-email-galak@kernel.crashing.org> <1292629858-10233-5-git-send-email-galak@kernel.crashing.org> <1292629858-10233-6-git-send-email-galak@kernel.crashing.org> <1292629858-10233-7-git-send-email-galak@kernel.crashing.org> <1292629858-10233-8-git-send-email-galak@kernel.crashing.org> Subject: [U-Boot] [PATCH 09/15] powerpc/85xx: Rework TQM boards pci_init_board to use common FSL PCIe code X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Remove duplicated code in TQM 85xx boards and utliize the common fsl_pcie_init_board(). Signed-off-by: Kumar Gala CC: wd@denx.de --- board/tqc/tqm85xx/law.c | 9 +-------- board/tqc/tqm85xx/tqm85xx.c | 41 ++++++++++++----------------------------- 2 files changed, 13 insertions(+), 37 deletions(-) diff --git a/board/tqc/tqm85xx/law.c b/board/tqc/tqm85xx/law.c index e684ba2..c596303 100644 --- a/board/tqc/tqm85xx/law.c +++ b/board/tqc/tqm85xx/law.c @@ -67,20 +67,13 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_2G, LAW_TRGT_IF_DDR), - SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW(CONFIG_SYS_LBC_FLASH_BASE, LAW_3_SIZE, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), -#ifdef CONFIG_PCIE1 - SET_LAW(CONFIG_SYS_PCIE1_MEM_BUS, LAW_5_SIZE, LAW_TRGT_IF_PCIE_1), -#else /* !CONFIG_PCIE1 */ +#ifndef CONFIG_PCIE1 SET_LAW(CONFIG_SYS_RIO_MEM_BASE, LAW_5_SIZE, LAW_TRGT_IF_RIO), #endif /* CONFIG_PCIE1 */ #if defined(CONFIG_CAN_DRIVER) || defined(CONFIG_NAND) SET_LAW(CONFIG_SYS_CAN_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), #endif /* CONFIG_CAN_DRIVER || CONFIG_NAND */ -#ifdef CONFIG_PCIE1 - SET_LAW(CONFIG_SYS_PCIE1_IO_BUS, LAW_SIZE_16M, LAW_TRGT_IF_PCIE_1), -#endif /* CONFIG_PCIE */ }; int num_law_entries = ARRAY_SIZE (law_table); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 43c73e1..99b1331 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -541,31 +541,29 @@ void local_bus_init (void) static struct pci_controller pci1_hose; #endif /* CONFIG_PCI1 */ -#ifdef CONFIG_PCIE1 -static struct pci_controller pcie1_hose; -#endif /* CONFIG_PCIE1 */ - void pci_init_board (void) { - struct fsl_pci_info pci_info[2]; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); int first_free_busno = 0; - int num = 0; +#ifdef CONFIG_PCI1 + struct fsl_pci_info pci_info; int pcie_ep; - __maybe_unused int pcie_configured; - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 devdisr = in_be32(&gur->devdisr); - u32 pordevsr = in_be32(&gur->pordevsr); -#ifdef CONFIG_PCI1 uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; uint pci_speed = CONFIG_SYS_CLK_FREQ; /* PCI PSPEED in [4:5] */ uint pci_clk_sel = in_be32(&gur->porpllsr) & MPC85xx_PORDEVSR_PCI1_SPD; if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { - SET_STD_PCI_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); + SET_STD_PCI_INFO(pci_info, 1); + set_next_law(pci_info.mem_phys, + law_size_bits(pci_info.mem_size), pci_info.law); + set_next_law(pci_info.io_phys, + law_size_bits(pci_info.io_size), pci_info.law); + + pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs); printf("PCI1: %d bit, %s MHz, %s, %s, %s\n", (pci_32) ? 32 : 64, (pci_speed == 33333333) ? "33" : @@ -573,7 +571,7 @@ void pci_init_board (void) pci_clk_sel ? "sync" : "async", pcie_ep ? "agent" : "host", pci_arb ? "arbiter" : "external-arbiter"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], + first_free_busno = fsl_pci_init_port(&pci_info, &pci1_hose, first_free_busno); #ifdef CONFIG_PCIX_CHECK if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1)) { @@ -596,22 +594,7 @@ void pci_init_board (void) setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); #endif -#ifdef CONFIG_PCIE1 - pcie_configured = is_serdes_configured(PCIE1); - - if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { - SET_STD_PCIE_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf("PCIE1: connected as %s\n", - pcie_ep ? "Endpoint" : "Root Complex"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno); - } else { - printf("PCIE1: disabled\n"); - } -#else - setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); -#endif /* CONFIG_PCIE1 */ + fsl_pcie_init_board(first_free_busno); } #ifdef CONFIG_OF_BOARD_SETUP