Patchwork [U-Boot,13/15] powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe code

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Submitter Kumar Gala
Date Dec. 17, 2010, 11:50 p.m.
Message ID <1292629858-10233-13-git-send-email-galak@kernel.crashing.org>
Download mbox | patch
Permalink /patch/76038/
State Accepted
Delegated to: Kumar Gala
Headers show

Comments

Kumar Gala - Dec. 17, 2010, 11:50 p.m.
Remove duplicated code in MPC8610HPCD board and utliize the common
fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
controllers based on which PCIe controllers are enabled.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 board/freescale/mpc8610hpcd/law.c         |    8 +---
 board/freescale/mpc8610hpcd/mpc8610hpcd.c |   80 +++++++++--------------------
 2 files changed, 25 insertions(+), 63 deletions(-)
Kumar Gala - Jan. 9, 2011, 8:49 p.m.
On Dec 17, 2010, at 5:50 PM, Kumar Gala wrote:

> Remove duplicated code in MPC8610HPCD board and utliize the common
> fsl_pcie_init_board().  We also now dynamically setup the LAWs for PCI
> controllers based on which PCIe controllers are enabled.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> board/freescale/mpc8610hpcd/law.c         |    8 +---
> board/freescale/mpc8610hpcd/mpc8610hpcd.c |   80 +++++++++--------------------
> 2 files changed, 25 insertions(+), 63 deletions(-)

applied to 85xx, fixed commit typo s/utliize/utilize/

- k

Patch

diff --git a/board/freescale/mpc8610hpcd/law.c b/board/freescale/mpc8610hpcd/law.c
index 0fc8384..26e41b6 100644
--- a/board/freescale/mpc8610hpcd/law.c
+++ b/board/freescale/mpc8610hpcd/law.c
@@ -1,5 +1,5 @@ 
 /*
- * Copyright 2008 Freescale Semiconductor, Inc.
+ * Copyright 2008,2010 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -31,14 +31,8 @@  struct law_entry law_table[] = {
 #if !defined(CONFIG_SPD_EEPROM)
 	SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1),
 #endif
-	SET_LAW(CONFIG_SYS_PCIE1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1),
-	SET_LAW(CONFIG_SYS_PCIE2_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2),
 	SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC),
-	SET_LAW(CONFIG_SYS_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1),
-	SET_LAW(CONFIG_SYS_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2),
 	SET_LAW(CONFIG_SYS_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
-	SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1),
-	SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1)
 };
 
 int num_law_entries = ARRAY_SIZE(law_table);
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 8abd917..e1ccff8 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -213,78 +213,44 @@  config_table:pci_mpc86xxcts_config_table
 };
 #endif /* CONFIG_PCI */
 
-#ifdef CONFIG_PCIE1
-static struct pci_controller pcie1_hose;
-#endif
-
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif
+static const char *slot_names[] = {
+	[PCIE1] = "ULI",
+	[PCIE2] = "Slot 1",
+};
+ 
+const char *board_serdes_name(enum srds_prtcl device)
+{
+	return slot_names[device];
+}
 
 void pci_init_board(void)
 {
 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
 	volatile ccsr_gur_t *gur = &immap->im_gur;
-	struct fsl_pci_info pci_info[3];
+	struct fsl_pci_info pci_info;
 	u32 devdisr, pordevsr;
-	int first_free_busno = 0;
-	int num = 0;
-
-	int pci_agent, pcie_ep, pcie_configured;
+	int first_free_busno;
+	int pci_agent;
 
 	devdisr = in_be32(&gur->devdisr);
 	pordevsr = in_be32(&gur->pordevsr);
 
-#ifdef CONFIG_PCIE1
-	pcie_configured = is_serdes_configured(PCIE1);
-
-	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
-		SET_STD_PCIE_INFO(pci_info[num], 1);
-		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
-			pcie_ep ? "Endpoint" : "Root Complex",
-			pci_info[num].regs);
-
-		first_free_busno = fsl_pci_init_port(&pci_info[num++],
-					&pcie1_hose, first_free_busno);
-	} else {
-		printf("PCIE1: disabled\n");
-	}
-
-	puts("\n");
-#else
-	setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCIE1); /* disable */
-#endif
-
-#ifdef CONFIG_PCIE2
-	pcie_configured = is_serdes_configured(PCIE2);
-
-	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
-		SET_STD_PCIE_INFO(pci_info[num], 2);
-		pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-		printf("PCIE2: connected to Slot as %s (base addr %lx)\n",
-			pcie_ep ? "Endpoint" : "Root Complex",
-			pci_info[num].regs);
-		first_free_busno = fsl_pci_init_port(&pci_info[num++],
-					&pcie2_hose, first_free_busno);
-	} else {
-		printf("PCIE2: disabled\n");
-	}
-
-	puts("\n");
-#else
-	setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCIE2); /* disable */
-#endif
+	first_free_busno = fsl_pcie_init_board(0);
 
 #ifdef CONFIG_PCI1
 	if (!(devdisr & MPC86xx_DEVDISR_PCI1)) {
-		SET_STD_PCI_INFO(pci_info[num], 1);
-		pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
+		SET_STD_PCI_INFO(pci_info, 1);
+		set_next_law(pci_info.mem_phys,
+			law_size_bits(pci_info.mem_size), pci_info.law);
+		set_next_law(pci_info.io_phys,
+			law_size_bits(pci_info.io_size), pci_info.law);
+
+		pci_agent = fsl_setup_hose(&pci1_hose, pci_info.regs);
 		printf("PCI: connected to PCI slots as %s" \
 			" (base address %lx)\n",
 			pci_agent ? "Agent" : "Host",
-			pci_info[num].regs);
-		first_free_busno = fsl_pci_init_port(&pci_info[num++],
+			pci_info.regs);
+		first_free_busno = fsl_pci_init_port(&pci_info,
 					&pci1_hose, first_free_busno);
 	} else {
 		printf("PCI: disabled\n");
@@ -294,6 +260,8 @@  void pci_init_board(void)
 #else
 	setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCI1); /* disable */
 #endif
+
+	fsl_pcie_init_board(first_free_busno);
 }
 
 #if defined(CONFIG_OF_BOARD_SETUP)