Patchwork [U-Boot,06/11] powerpc/85xx: Add is_serdes_configured() support for MPC8548 SERDES

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Submitter Kumar Gala
Date Dec. 17, 2010, 11:33 p.m.
Message ID <1292628816-9436-6-git-send-email-galak@kernel.crashing.org>
Download mbox | patch
Permalink /patch/76019/
State Accepted
Commit bc48d0d5036f5759688f0902e8a652d372186eda
Delegated to: Kumar Gala
Headers show

Comments

Kumar Gala - Dec. 17, 2010, 11:33 p.m.
Add the ability to determine if a given IP block connected on SERDES is
configured.  This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/cpu/mpc85xx/Makefile         |    1 +
 arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c |   65 +++++++++++++++++++++++++++++
 2 files changed, 66 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
Kumar Gala - Jan. 5, 2011, 12:10 a.m.
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:

> Add the ability to determine if a given IP block connected on SERDES is
> configured.  This is useful for things like PCIe and SRIO since they are
> only ever connected on SERDES.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc85xx/Makefile         |    1 +
> arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c |   65 +++++++++++++++++++++++++++++
> 2 files changed, 66 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c

applied to 85xx

- k

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/Makefile b/arch/powerpc/cpu/mpc85xx/Makefile
index 9ec19bb..e1320bf 100644
--- a/arch/powerpc/cpu/mpc85xx/Makefile
+++ b/arch/powerpc/cpu/mpc85xx/Makefile
@@ -78,6 +78,7 @@  COBJS-$(CONFIG_FSL_CORENET) += fsl_corenet_serdes.o
 
 # SoC specific SERDES support
 COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
+COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o
 COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o
 COBJS-$(CONFIG_P1013)	+= p1013_serdes.o
 COBJS-$(CONFIG_P1022)	+= p1022_serdes.o
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
new file mode 100644
index 0000000..76288cd
--- /dev/null
+++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
@@ -0,0 +1,65 @@ 
+/*
+ * Copyright 2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/immap_85xx.h>
+#include <asm/fsl_serdes.h>
+
+#define SRDS1_MAX_LANES		8
+
+static u32 serdes1_prtcl_map;
+
+static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
+	[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
+	[0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
+	[0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
+	[0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
+	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
+};
+
+int is_serdes_configured(enum srds_prtcl prtcl)
+{
+	return (1 << prtcl) & serdes1_prtcl_map;
+}
+
+void fsl_serdes_init(void)
+{
+	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+	u32 pordevsr = in_be32(&gur->pordevsr);
+	u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
+				MPC85xx_PORDEVSR_IO_SEL_SHIFT;
+	int lane;
+
+	debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
+
+	if (srds1_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) {
+		printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
+		return ;
+	}
+
+	for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
+		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane];
+		serdes1_prtcl_map |= (1 << lane_prtcl);
+	}
+}