[linux,dev-4.10,v3,3/3] aspeed: barreleye: Debounce BMC_PWBTN_IN_N through devicetree

Submitted by Andrew Jeffery on May 5, 2017, 2:42 a.m.

Details

Message ID 20170505024227.30962-4-andrew@aj.id.au
State Needs Review / ACK
Headers show

Commit Message

Andrew Jeffery May 5, 2017, 2:42 a.m.
This is a breaking change for userspace, as the GPIO is now represented
as a key-code from a GPIO keyboard input.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
 arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts | 11 +++++++++++
 arch/arm/mach-aspeed/aspeed.c                  |  8 --------
 2 files changed, 11 insertions(+), 8 deletions(-)

Patch hide | download patch | download mbox

diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
index be1f2d120fee..9b75fc039f2d 100644
--- a/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-barreleye.dts
@@ -74,6 +74,17 @@ 
 			gpios = <&gpio ASPEED_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
 		};
 	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		gpioe0 {
+			gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_LOW>;
+			label = "bmc_pwbtn_in_n";
+			linux,code = <0>;
+			debounce-interval = <20>;
+		};
+	};
 };
 
 &pinctrl {
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 31b0e69f62b8..760fed641a0b 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -73,14 +73,6 @@  static void __init do_barreleye_setup(void)
 	writel(reg, AST_IO(AST_BASE_GPIO | 0x20));
 	writel(0xC738F20A, AST_IO(AST_BASE_GPIO | 0x24));
 	writel(0x0031FFAF, AST_IO(AST_BASE_GPIO | 0x80));
-
-	/* Select TIMER3 as debounce timer */
-	writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x48));
-	writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x4C));
-
-	/* Set debounce timer to 480000 cycles, with a pclk of 48MHz,
-	 * corresponds to 20 ms. This time was found by experimentation */
-	writel(0x000EA600, AST_IO(AST_BASE_GPIO | 0x58));
 }
 
 static void __init do_palmetto_setup(void)