| Message ID | 20170505024227.30962-3-andrew@aj.id.au |
|---|---|
| State | Accepted, archived |
| Headers | show |
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c index 88d0a59d043d..31b0e69f62b8 100644 --- a/arch/arm/mach-aspeed/aspeed.c +++ b/arch/arm/mach-aspeed/aspeed.c @@ -64,9 +64,6 @@ static void __init do_barreleye_setup(void) writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00)); writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04)); - /* To enable GPIOE0 pass through function debounce mode */ - writel(0x010FFFFF, AST_IO(AST_BASE_SCU | 0xA8)); - /* * Do read/modify/write on power gpio to prevent resetting power on * reboot
Passthrough debouncing concerns GPIO passthrough mode, but both GPIOE0 and GPIOE1 are independently exported by userspace. Therefore barreleye is not using passthrough mode and we can drop this configuration. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- arch/arm/mach-aspeed/aspeed.c | 3 --- 1 file changed, 3 deletions(-)