@@ -14,7 +14,7 @@
#include "fsi-master.h"
-#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
+#define FSI_GPIO_STD_DLY 3 /* Standard pin delay in uS */
#define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */
#define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */
#define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */
@@ -76,10 +76,10 @@ static void clock_toggle(struct fsi_master_gpio *master, int count)
int i;
for (i = 0; i < count; i++) {
- ndelay(FSI_GPIO_STD_DLY);
gpiod_set_value(master->gpio_clk, 0);
- ndelay(FSI_GPIO_STD_DLY);
+ udelay(FSI_GPIO_STD_DLY);
gpiod_set_value(master->gpio_clk, 1);
+ udelay(FSI_GPIO_STD_DLY);
}
}
@@ -87,7 +87,6 @@ static int sda_in(struct fsi_master_gpio *master)
{
int in;
- ndelay(FSI_GPIO_STD_DLY);
in = gpiod_get_value(master->gpio_data);
return in ? 1 : 0;
}
Improve stability in the FSI protocol by re-ordering the clocking delays. Increase clocking delays to 3 microseconds. Remove delay prior to sampling input - now redundant given new clocking delay order. New effective delay per clock toggle is now 6 microseconds. Previous clocking summed up to 3 nS but real time measurements of each 1 nS delay actually was approx 1.8 microseconds. Previous total delay was then 1.8 * 3 = 5.4 microseconds. Signed-off-by: Christopher Bostic <cbostic@linux.vnet.ibm.com> --- drivers/fsi/fsi-master-gpio.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)