From patchwork Thu Dec 16 22:27:20 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Eric Botcazou X-Patchwork-Id: 75810 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 61FF0B6EF2 for ; Fri, 17 Dec 2010 09:29:35 +1100 (EST) Received: (qmail 17116 invoked by alias); 16 Dec 2010 22:29:33 -0000 Received: (qmail 17021 invoked by uid 22791); 16 Dec 2010 22:29:28 -0000 X-SWARE-Spam-Status: No, hits=-1.9 required=5.0 tests=AWL,BAYES_00,TW_FC X-Spam-Check-By: sourceware.org Received: from mel.act-europe.fr (HELO mel.act-europe.fr) (194.98.77.210) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 16 Dec 2010 22:29:19 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id 07B0BCB01E7; Thu, 16 Dec 2010 23:29:16 +0100 (CET) Received: from mel.act-europe.fr ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XvI7pQgYGrAJ; Thu, 16 Dec 2010 23:29:15 +0100 (CET) Received: from [192.168.1.2] (bon31-9-83-155-120-49.fbx.proxad.net [83.155.120.49]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mel.act-europe.fr (Postfix) with ESMTP id 84AF6CB01BA; Thu, 16 Dec 2010 23:29:15 +0100 (CET) From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: [SPARC] Add support for LEON processor Date: Thu, 16 Dec 2010 23:27:20 +0100 User-Agent: KMail/1.9.9 Cc: Konrad Eisele MIME-Version: 1.0 Message-Id: <201012162327.21362.ebotcazou@adacore.com> Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org This patch finally adds support for the LEON family of processors to the SPARC back-end. It also removes some left-overs (sparc86x and old Solaris stuff). This is mostly Konrad et al.'s work, with some bits coming from AdaCore. Applied on the mainline. I'll add a blurb to the CHANGES file later. 2010-12-16 Konrad Eisele Eric Botcazou Support for LEON processor         * config.gcc (sparc-*-elf*): Deal with sparc-leon specifically.         (sparc-*-linux*): Likewise. (sparc-*-rtems*): Remove Solaris left-overs.         (sparc*-*-*): Remove obsolete sparc86x setting.         (sparc-leon*): Default to --with-cpu=v8 and --with-tune=leon.         * doc/invoke.texi (SPARC Options): Document -mcpu/-mtune=leon.         * config/sparc/sparc.h (TARGET_CPU_leon): Define.         (TARGET_CPU_sparc86x): Delete.         (TARGET_CPU_cypress): Define as alias to TARGET_CPU_v7.         (TARGET_CPU_f930): Define as alias to TARGET_CPU_sparclite.         (TARGET_CPU_f934): Likewise.         (TARGET_CPU_tsc701): Define as alias to TARGET_CPU_sparclet.         (CPP_CPU_SPEC): Add entry for -mcpu=leon.         (enum processor_type): Add PROCESSOR_LEON. Reorganize.         * config/sparc/sparc.c (leon_costs): New cost array.         (sparc_option_override): Add entry for TARGET_CPU_leon and -mcpu=leon.         Initialize cost array to leon_costs if -mtune=leon.         * config/sparc/sparc.md (cpu attribute): Add leon. Reorganize.         Include leon.md scheduling description.         * config/sparc/leon.md: New file.         * config/sparc/t-elf: Do not assemble Solaris startup files.         * config/sparc/t-leon: New file.         * config/sparc/t-leon3: Likewise. Index: doc/invoke.texi =================================================================== --- doc/invoke.texi (revision 167901) +++ doc/invoke.texi (working copy) @@ -16951,8 +16951,8 @@ the rules of the ABI@. @opindex mcpu Set the instruction set, register set, and instruction scheduling parameters for machine type @var{cpu_type}. Supported values for @var{cpu_type} are -@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{sparclite}, -@samp{f930}, @samp{f934}, @samp{hypersparc}, @samp{sparclite86x}, +@samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{hypersparc}, +@samp{leon}, @samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, @samp{sparclet}, @samp{tsc701}, @samp{v9}, @samp{ultrasparc}, @samp{ultrasparc3}, @samp{niagara} and @samp{niagara2}. @@ -16965,7 +16965,7 @@ implementations. @smallexample v7: cypress - v8: supersparc, hypersparc + v8: supersparc, hypersparc, leon sparclite: f930, f934, sparclite86x sparclet: tsc701 v9: ultrasparc, ultrasparc3, niagara, niagara2 @@ -17018,9 +17018,9 @@ option @option{-mcpu=@var{cpu_type}} wou The same values for @option{-mcpu=@var{cpu_type}} can be used for @option{-mtune=@var{cpu_type}}, but the only useful values are those that select a particular cpu implementation. Those are @samp{cypress}, -@samp{supersparc}, @samp{hypersparc}, @samp{f930}, @samp{f934}, -@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, -@samp{ultrasparc3}, @samp{niagara}, and @samp{niagara2}. +@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{f930}, @samp{f934}, +@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3}, +@samp{niagara}, and @samp{niagara2}. @item -mv8plus @itemx -mno-v8plus Index: config.gcc =================================================================== --- config.gcc (revision 167901) +++ config.gcc (working copy) @@ -2450,18 +2450,39 @@ sh-wrs-vxworks) ;; sparc-*-elf*) tm_file="${tm_file} dbxelf.h elfos.h newlib-stdint.h sparc/sysv4.h sparc/sp-elf.h" - tmake_file="sparc/t-elf sparc/t-crtfm" - extra_parts="crti.o crtn.o crtbegin.o crtend.o" + case ${target} in + *-leon-*) + tmake_file="sparc/t-leon" + ;; + *-leon[3-9]*) + tmake_file="sparc/t-leon3" + ;; + *) + tmake_file="sparc/t-elf" + ;; + esac + tmake_file="${tmake_file} sparc/t-crtfm" + extra_parts="crtbegin.o crtend.o" ;; sparc-*-rtems*) tm_file="${tm_file} dbxelf.h elfos.h sparc/sysv4.h sparc/sp-elf.h sparc/rtemself.h rtems.h newlib-stdint.h" tmake_file="sparc/t-elf sparc/t-crtfm t-rtems" - extra_parts="crti.o crtn.o crtbegin.o crtend.o" + extra_parts="crtbegin.o crtend.o" ;; sparc-*-linux*) tm_file="${tm_file} dbxelf.h elfos.h sparc/sysv4.h linux.h glibc-stdint.h" extra_options="${extra_options} sparc/long-double-switch.opt" - tmake_file="${tmake_file} sparc/t-linux" + case ${target} in + *-leon-*) + tmake_file="${tmake_file} sparc/t-leon" + ;; + *-leon[3-9]*) + tmake_file="${tmake_file} sparc/t-leon3" + ;; + *) + tmake_file="${tmake_file} sparc/t-linux" + ;; + esac if test x$enable_targets = xall; then tm_file="sparc/biarch64.h ${tm_file} sparc/linux64.h" tmake_file="${tmake_file} sparc/t-linux64" @@ -2922,6 +2943,9 @@ if test x$with_cpu = x ; then mips*-*-vxworks) with_arch=mips2 ;; + sparc-leon*-*) + with_cpu=v8; + ;; sparc*-*-*) with_cpu="`echo ${target} | sed 's/-.*$//'`" ;; @@ -3441,9 +3465,11 @@ case "${target}" in for which in cpu tune; do eval "val=\$with_$which" case ${val} in - "" | sparc | sparcv9 | sparc64 | sparc86x \ - | v7 | cypress | v8 | supersparc | sparclite | f930 \ - | f934 | hypersparc | sparclite86x | sparclet | tsc701 \ + "" | sparc | sparcv9 | sparc64 \ + | v7 | cypress \ + | v8 | supersparc | hypersparc | leon \ + | sparclite | f930 | f934 | sparclite86x \ + | sparclet | tsc701 \ | v9 | ultrasparc | ultrasparc3 | niagara | niagara2) # OK ;; @@ -3587,6 +3613,15 @@ case ${target} in cxx_target_objs="${cxx_target_objs} sh-c.o" ;; + sparc-leon*-*) + if test x$with_tune = x ; then + with_tune=leon; + fi + + # The SPARC port checks this value at compile-time. + target_cpu_default2="TARGET_CPU_$with_cpu" + ;; + sparc*-*-*) # Some standard aliases. case x$with_cpu in @@ -3601,6 +3636,7 @@ case ${target} in # The SPARC port checks this value at compile-time. target_cpu_default2="TARGET_CPU_$with_cpu" ;; + v850*-*-*) # FIXME: The v850 is "special" in that it does not support # runtime CPU selection, only --with-cpu. Index: config/sparc/t-leon3 =================================================================== --- config/sparc/t-leon3 (revision 0) +++ config/sparc/t-leon3 (revision 0) @@ -0,0 +1,37 @@ +# Copyright (C) 2010 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +# We want fine grained libraries, so use the new code to build the +# floating point emulation libraries. +FPBIT = fp-bit.c +DPBIT = dp-bit.c + +dp-bit.c: $(srcdir)/config/fp-bit.c + cat $(srcdir)/config/fp-bit.c > dp-bit.c + +fp-bit.c: $(srcdir)/config/fp-bit.c + echo '#define FLOAT' > fp-bit.c + cat $(srcdir)/config/fp-bit.c >> fp-bit.c + +# Multilibs for LEON3 +MULTILIB_OPTIONS = msoft-float +MULTILIB_DIRNAMES = soft +MULTILIB_MATCHES = msoft-float=mno-fpu + +LIBGCC = stmp-multilib +INSTALL_LIBGCC = install-multilib Index: config/sparc/sparc.md =================================================================== --- config/sparc/sparc.md (revision 167901) +++ config/sparc/sparc.md (working copy) @@ -104,9 +104,14 @@ (define_attr "cpu" cypress, v8, supersparc, - sparclite,f930,f934, - hypersparc,sparclite86x, - sparclet,tsc701, + hypersparc, + leon, + sparclite, + f930, + f934, + sparclite86x, + sparclet, + tsc701, v9, ultrasparc, ultrasparc3, @@ -339,6 +344,7 @@ (define_delay (eq_attr "type" "return") (include "cypress.md") (include "supersparc.md") (include "hypersparc.md") +(include "leon.md") (include "sparclet.md") (include "ultra1_2.md") (include "ultra3.md") Index: config/sparc/sparc.c =================================================================== --- config/sparc/sparc.c (revision 167901) +++ config/sparc/sparc.c (working copy) @@ -129,6 +129,30 @@ struct processor_costs hypersparc_costs }; static const +struct processor_costs leon_costs = { + COSTS_N_INSNS (1), /* int load */ + COSTS_N_INSNS (1), /* int signed load */ + COSTS_N_INSNS (1), /* int zeroed load */ + COSTS_N_INSNS (1), /* float load */ + COSTS_N_INSNS (1), /* fmov, fneg, fabs */ + COSTS_N_INSNS (1), /* fadd, fsub */ + COSTS_N_INSNS (1), /* fcmp */ + COSTS_N_INSNS (1), /* fmov, fmovr */ + COSTS_N_INSNS (1), /* fmul */ + COSTS_N_INSNS (15), /* fdivs */ + COSTS_N_INSNS (15), /* fdivd */ + COSTS_N_INSNS (23), /* fsqrts */ + COSTS_N_INSNS (23), /* fsqrtd */ + COSTS_N_INSNS (5), /* imul */ + COSTS_N_INSNS (5), /* imulX */ + 0, /* imul bit factor */ + COSTS_N_INSNS (5), /* idiv */ + COSTS_N_INSNS (5), /* idivX */ + COSTS_N_INSNS (1), /* movcc/movr */ + 0, /* shift penalty */ +}; + +static const struct processor_costs sparclet_costs = { COSTS_N_INSNS (3), /* int load */ COSTS_N_INSNS (3), /* int signed load */ @@ -698,19 +722,20 @@ sparc_option_override (void) { NULL, (enum cmodel) 0 } }; const struct code_model *cmodel; - /* Map TARGET_CPU_DEFAULT to value for -m{arch,tune}=. */ + /* Map TARGET_CPU_DEFAULT to value for -m{cpu,tune}=. */ static struct cpu_default { const int cpu; const char *const name; } const cpu_default[] = { /* There must be one entry here for each TARGET_CPU value. */ { TARGET_CPU_sparc, "cypress" }, - { TARGET_CPU_sparclet, "tsc701" }, - { TARGET_CPU_sparclite, "f930" }, { TARGET_CPU_v8, "v8" }, + { TARGET_CPU_supersparc, "supersparc" }, { TARGET_CPU_hypersparc, "hypersparc" }, + { TARGET_CPU_leon, "leon" }, + { TARGET_CPU_sparclite, "f930" }, { TARGET_CPU_sparclite86x, "sparclite86x" }, - { TARGET_CPU_supersparc, "supersparc" }, + { TARGET_CPU_sparclet, "tsc701" }, { TARGET_CPU_v9, "v9" }, { TARGET_CPU_ultrasparc, "ultrasparc" }, { TARGET_CPU_ultrasparc3, "ultrasparc3" }, @@ -731,28 +756,32 @@ sparc_option_override (void) { "v8", PROCESSOR_V8, MASK_ISA, MASK_V8 }, /* TI TMS390Z55 supersparc */ { "supersparc", PROCESSOR_SUPERSPARC, MASK_ISA, MASK_V8 }, + { "hypersparc", PROCESSOR_HYPERSPARC, MASK_ISA, MASK_V8|MASK_FPU }, + /* LEON */ + { "leon", PROCESSOR_LEON, MASK_ISA, MASK_V8|MASK_FPU }, { "sparclite", PROCESSOR_SPARCLITE, MASK_ISA, MASK_SPARCLITE }, - /* The Fujitsu MB86930 is the original sparclite chip, with no fpu. - The Fujitsu MB86934 is the recent sparclite chip, with an fpu. */ + /* The Fujitsu MB86930 is the original sparclite chip, with no FPU. */ { "f930", PROCESSOR_F930, MASK_ISA|MASK_FPU, MASK_SPARCLITE }, + /* The Fujitsu MB86934 is the recent sparclite chip, with an FPU. */ { "f934", PROCESSOR_F934, MASK_ISA, MASK_SPARCLITE|MASK_FPU }, - { "hypersparc", PROCESSOR_HYPERSPARC, MASK_ISA, MASK_V8|MASK_FPU }, { "sparclite86x", PROCESSOR_SPARCLITE86X, MASK_ISA|MASK_FPU, MASK_SPARCLITE }, { "sparclet", PROCESSOR_SPARCLET, MASK_ISA, MASK_SPARCLET }, /* TEMIC sparclet */ { "tsc701", PROCESSOR_TSC701, MASK_ISA, MASK_SPARCLET }, { "v9", PROCESSOR_V9, MASK_ISA, MASK_V9 }, - /* TI ultrasparc I, II, IIi */ - { "ultrasparc", PROCESSOR_ULTRASPARC, MASK_ISA, MASK_V9 - /* Although insns using %y are deprecated, it is a clear win on current - ultrasparcs. */ - |MASK_DEPRECATED_V8_INSNS}, - /* TI ultrasparc III */ - /* ??? Check if %y issue still holds true in ultra3. */ - { "ultrasparc3", PROCESSOR_ULTRASPARC3, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS}, + /* UltraSPARC I, II, IIi */ + { "ultrasparc", PROCESSOR_ULTRASPARC, MASK_ISA, + /* Although insns using %y are deprecated, it is a clear win. */ + MASK_V9|MASK_DEPRECATED_V8_INSNS}, + /* UltraSPARC III */ + /* ??? Check if %y issue still holds true. */ + { "ultrasparc3", PROCESSOR_ULTRASPARC3, MASK_ISA, + MASK_V9|MASK_DEPRECATED_V8_INSNS}, /* UltraSPARC T1 */ - { "niagara", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS}, + { "niagara", PROCESSOR_NIAGARA, MASK_ISA, + MASK_V9|MASK_DEPRECATED_V8_INSNS}, + /* UltraSPARC T2 */ { "niagara2", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9}, { 0, (enum processor_type) 0, 0, 0 } }; @@ -907,6 +936,9 @@ sparc_option_override (void) case PROCESSOR_SPARCLITE86X: sparc_costs = &hypersparc_costs; break; + case PROCESSOR_LEON: + sparc_costs = &leon_costs; + break; case PROCESSOR_SPARCLET: case PROCESSOR_TSC701: sparc_costs = &sparclet_costs; Index: config/sparc/leon.md =================================================================== --- config/sparc/leon.md (revision 0) +++ config/sparc/leon.md (revision 0) @@ -0,0 +1,56 @@ +;; Scheduling description for LEON. +;; Copyright (C) 2010 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify +;; it under the terms of the GNU General Public License as published by +;; the Free Software Foundation; either version 3, or (at your option) +;; any later version. +;; +;; GCC is distributed in the hope that it will be useful, +;; but WITHOUT ANY WARRANTY; without even the implied warranty of +;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +;; GNU General Public License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; . + + +(define_automaton "leon") + +(define_cpu_unit "leon_memory, leon_fpalu" "leon") +(define_cpu_unit "leon_fpmds" "leon") +(define_cpu_unit "write_buf" "leon") + +(define_insn_reservation "leon_load" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "load,sload,fpload")) + "leon_memory") + +(define_insn_reservation "leon_store" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "store,fpstore")) + "leon_memory+write_buf") + +(define_insn_reservation "leon_fp_alu" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fp,fpmove")) + "leon_fpalu, nothing") + +(define_insn_reservation "leon_fp_mult" 1 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fpmul")) + "leon_fpmds, nothing") + +(define_insn_reservation "leon_fp_div" 16 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fpdivs,fpdivd")) + "leon_fpmds, nothing*15") + +(define_insn_reservation "leon_fp_sqrt" 23 + (and (eq_attr "cpu" "leon") + (eq_attr "type" "fpsqrts,fpsqrtd")) + "leon_fpmds, nothing*21") + Index: config/sparc/sparc.h =================================================================== --- config/sparc/sparc.h (revision 167901) +++ config/sparc/sparc.h (working copy) @@ -228,21 +228,25 @@ extern enum cmodel sparc_cmodel; /* Note that TARGET_CPU_v9 is assumed to start the list of 64-bit capable cpu's. */ #define TARGET_CPU_sparc 0 -#define TARGET_CPU_v7 0 /* alias for previous */ -#define TARGET_CPU_sparclet 1 -#define TARGET_CPU_sparclite 2 -#define TARGET_CPU_v8 3 /* generic v8 implementation */ -#define TARGET_CPU_supersparc 4 -#define TARGET_CPU_hypersparc 5 -#define TARGET_CPU_sparc86x 6 +#define TARGET_CPU_v7 0 /* alias */ +#define TARGET_CPU_cypress 0 /* alias */ +#define TARGET_CPU_v8 1 /* generic v8 implementation */ +#define TARGET_CPU_supersparc 2 +#define TARGET_CPU_hypersparc 3 +#define TARGET_CPU_leon 4 +#define TARGET_CPU_sparclite 5 +#define TARGET_CPU_f930 5 /* alias */ +#define TARGET_CPU_f934 5 /* alias */ #define TARGET_CPU_sparclite86x 6 -#define TARGET_CPU_v9 7 /* generic v9 implementation */ -#define TARGET_CPU_sparcv9 7 /* alias */ -#define TARGET_CPU_sparc64 7 /* alias */ -#define TARGET_CPU_ultrasparc 8 -#define TARGET_CPU_ultrasparc3 9 -#define TARGET_CPU_niagara 10 -#define TARGET_CPU_niagara2 11 +#define TARGET_CPU_sparclet 7 +#define TARGET_CPU_tsc701 7 /* alias */ +#define TARGET_CPU_v9 8 /* generic v9 implementation */ +#define TARGET_CPU_sparcv9 8 /* alias */ +#define TARGET_CPU_sparc64 8 /* alias */ +#define TARGET_CPU_ultrasparc 9 +#define TARGET_CPU_ultrasparc3 10 +#define TARGET_CPU_niagara 11 +#define TARGET_CPU_niagara2 12 #if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \ || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \ @@ -299,6 +303,11 @@ extern enum cmodel sparc_cmodel; #define ASM_CPU32_DEFAULT_SPEC "-Asparclite" #endif +#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite86x +#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite86x__" +#define ASM_CPU32_DEFAULT_SPEC "-Asparclite" +#endif + #if TARGET_CPU_DEFAULT == TARGET_CPU_supersparc #define CPP_CPU32_DEFAULT_SPEC "-D__supersparc__ -D__sparc_v8__" #define ASM_CPU32_DEFAULT_SPEC "" @@ -309,9 +318,9 @@ extern enum cmodel sparc_cmodel; #define ASM_CPU32_DEFAULT_SPEC "" #endif -#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite86x -#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite86x__" -#define ASM_CPU32_DEFAULT_SPEC "-Asparclite" +#if TARGET_CPU_DEFAULT == TARGET_CPU_leon +#define CPP_CPU32_DEFAULT_SPEC "-D__leon__ -D__sparc_v8__" +#define ASM_CPU32_DEFAULT_SPEC "" #endif #endif @@ -360,10 +369,11 @@ extern enum cmodel sparc_cmodel; %{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \ %{mcpu=sparclite:-D__sparclite__} \ %{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \ +%{mcpu=sparclite86x:-D__sparclite86x__} \ %{mcpu=v8:-D__sparc_v8__} \ %{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \ %{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \ -%{mcpu=sparclite86x:-D__sparclite86x__} \ +%{mcpu=leon:-D__leon__ -D__sparc_v8__} \ %{mcpu=v9:-D__sparc_v9__} \ %{mcpu=ultrasparc:-D__sparc_v9__} \ %{mcpu=ultrasparc3:-D__sparc_v9__} \ @@ -526,10 +536,11 @@ enum processor_type { PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC, + PROCESSOR_HYPERSPARC, + PROCESSOR_LEON, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, - PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, Index: config/sparc/t-leon =================================================================== --- config/sparc/t-leon (revision 0) +++ config/sparc/t-leon (revision 0) @@ -0,0 +1,42 @@ +# Copyright (C) 2010 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +LIB1ASMSRC = sparc/lb1spc.asm +LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3 + +# We want fine grained libraries, so use the new code to build the +# floating point emulation libraries. +FPBIT = fp-bit.c +DPBIT = dp-bit.c + +dp-bit.c: $(srcdir)/config/fp-bit.c + cat $(srcdir)/config/fp-bit.c > dp-bit.c + +fp-bit.c: $(srcdir)/config/fp-bit.c + echo '#define FLOAT' > fp-bit.c + cat $(srcdir)/config/fp-bit.c >> fp-bit.c + +# Multilibs for LEON +# LEON is a SPARC-V8, but the AT697 implementation has a bug in the +# V8-specific instructions. +MULTILIB_OPTIONS = mcpu=v7 msoft-float +MULTILIB_DIRNAMES = v7 soft +MULTILIB_MATCHES = mcpu?v7=mv7 msoft-float=mno-fpu + +LIBGCC = stmp-multilib +INSTALL_LIBGCC = install-multilib Index: config/sparc/t-elf =================================================================== --- config/sparc/t-elf (revision 167901) +++ config/sparc/t-elf (working copy) @@ -1,5 +1,5 @@ -# Copyright (C) 1997, 1998, 1999, 2001, 2002, 2005, -# 2007 Free Software Foundation, Inc. +# Copyright (C) 1997, 1998, 1999, 2001, 2002, 2005, 2007, 2010 +# Free Software Foundation, Inc. # # This file is part of GCC. # @@ -32,17 +32,9 @@ fp-bit.c: $(srcdir)/config/fp-bit.c echo '#define FLOAT' > fp-bit.c cat $(srcdir)/config/fp-bit.c >> fp-bit.c -# MULTILIB_OPTIONS should have msparclite too, but we'd have to make -# gas build... MULTILIB_OPTIONS = msoft-float mcpu=v8 MULTILIB_DIRNAMES = soft v8 MULTILIB_MATCHES = msoft-float=mno-fpu mcpu?v8=mv8 LIBGCC = stmp-multilib INSTALL_LIBGCC = install-multilib - -# Assemble startup files. -$(T)crti.o: $(srcdir)/config/sparc/sol2-ci.asm $(GCC_PASSES) - $(GCC_FOR_TARGET) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sparc/sol2-ci.asm -$(T)crtn.o: $(srcdir)/config/sparc/sol2-cn.asm $(GCC_PASSES) - $(GCC_FOR_TARGET) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sparc/sol2-cn.asm