From patchwork Mon May 1 12:06:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Wunner X-Patchwork-Id: 757148 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3wGjsg489gz9s7y for ; Mon, 1 May 2017 22:09:59 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1165099AbdEAMJ6 (ORCPT ); Mon, 1 May 2017 08:09:58 -0400 Received: from mailout2.hostsharing.net ([83.223.90.233]:60817 "EHLO mailout2.hostsharing.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1165096AbdEAMJ6 (ORCPT ); Mon, 1 May 2017 08:09:58 -0400 Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mailout2.hostsharing.net (Postfix) with ESMTPS id 1FCE810189B77; Mon, 1 May 2017 14:09:33 +0200 (CEST) Received: from localhost (5-38-90-81.adsl.cmo.de [81.90.38.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by h08.hostsharing.net (Postfix) with ESMTPSA id 3AF1E603E052; Mon, 1 May 2017 14:09:55 +0200 (CEST) X-Mailbox-Line: From 60882c9eb29a5eb0197efd11dd94a2c7cdc43ffa Mon Sep 17 00:00:00 2001 Message-Id: <60882c9eb29a5eb0197efd11dd94a2c7cdc43ffa.1493631639.git.lukas@wunner.de> In-Reply-To: References: From: Lukas Wunner Date: Mon, 1 May 2017 14:06:39 +0200 Subject: [PATCH 3/5] PCI: pciehp: Resume to D0 on sysfs read access To: Bjorn Helgaas , linux-pci@vger.kernel.org, Ashok Raj , Yinghai Lu Cc: "Rafael J. Wysocki" , Mika Westerberg , Erik Veijola , Keith Busch , Krishna Dhulipala , Wei Zhang Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Ensure accessibility of config space when it is read via sysfs. Accessibility on write is already covered by the runtime resume in pcie_do_write_cmd(). Cc: Rafael J. Wysocki Cc: Mika Westerberg Cc: Erik Veijola Cc: Ashok Raj Cc: Keith Busch Cc: Yinghai Lu Cc: Krishna Dhulipala Cc: Wei Zhang Signed-off-by: Lukas Wunner --- drivers/pci/hotplug/pciehp_hpc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 143e2143d62e..70dd9ae4c097 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -369,7 +369,9 @@ int pciehp_get_raw_indicator_status(struct hotplug_slot *hotplug_slot, struct pci_dev *pdev = ctrl_dev(slot->ctrl); u16 slot_ctrl; + pm_runtime_get_sync(&pdev->dev); pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); + pm_runtime_put(&pdev->dev); *status = (slot_ctrl & (PCI_EXP_SLTCTL_AIC | PCI_EXP_SLTCTL_PIC)) >> 6; return 0; } @@ -380,7 +382,9 @@ void pciehp_get_attention_status(struct slot *slot, u8 *status) struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_ctrl; + pm_runtime_get_sync(&pdev->dev); pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); + pm_runtime_put(&pdev->dev); ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__, pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); @@ -406,7 +410,9 @@ void pciehp_get_power_status(struct slot *slot, u8 *status) struct pci_dev *pdev = ctrl_dev(ctrl); u16 slot_ctrl; + pm_runtime_get_sync(&pdev->dev); pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl); + pm_runtime_put(&pdev->dev); ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__, pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl); @@ -428,7 +434,9 @@ void pciehp_get_latch_status(struct slot *slot, u8 *status) struct pci_dev *pdev = ctrl_dev(slot->ctrl); u16 slot_status; + pm_runtime_get_sync(&pdev->dev); pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); + pm_runtime_put(&pdev->dev); *status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS); } @@ -437,7 +445,9 @@ void pciehp_get_adapter_status(struct slot *slot, u8 *status) struct pci_dev *pdev = ctrl_dev(slot->ctrl); u16 slot_status; + pm_runtime_get_sync(&pdev->dev); pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status); + pm_runtime_put(&pdev->dev); *status = !!(slot_status & PCI_EXP_SLTSTA_PDS); }