[U-Boot,2/3] fsl_esdhc: Fix max clock frequency

Submitted by Kumar Gala on Dec. 15, 2010, 8:20 a.m.

Details

Message ID 1292401217-21154-3-git-send-email-galak@kernel.crashing.org
State Accepted
Commit 9a4d50e34dde4d03f9c7c595f548d8c214d98eb7
Headers show

Commit Message

Kumar Gala Dec. 15, 2010, 8:20 a.m.
From: Jerry Huang <Changm-Ming.Huang@freescale.com>

The max clock of MMC is 52MHz

Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
---
 drivers/mmc/fsl_esdhc.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Stefano Babic Dec. 16, 2010, 5:41 p.m.
On 12/15/2010 09:20 AM, Kumar Gala wrote:
> From: Jerry Huang <Changm-Ming.Huang@freescale.com>
> 
> The max clock of MMC is 52MHz
> 
> Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com>
> ---

It runs successfully on i.MX51.

Tested-by: Stefano Babic <sbabic@denx.de>

Regards,
Stefano Babic

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diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 73d5cd3..7bab2f6 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -477,7 +477,7 @@  int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
 	mmc->f_min = 400000;
-	mmc->f_max = MIN(gd->sdhc_clk, 50000000);
+	mmc->f_max = MIN(gd->sdhc_clk, 52000000);
 
 	mmc_register(mmc);