| Message ID | 20170427060823.32226-5-andrew@aj.id.au |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
Hi Andrew, Joel, I was working on a pre-GA Garrison machine which uses PHY as Firestone. But later it's found out that GA machine uses NCSI. I had some patches related to this sent to OpenBMC, which is now abandoned. So this patch can be dropped, though the lines should be removed as well. - - /* SCU setup */ - writel(0xd7000000, AST_IO(AST_BASE_SCU | 0x88)); Thanks! -- BRs, Lei YU On Thu, Apr 27, 2017 at 2:08 PM, Andrew Jeffery <andrew@aj.id.au> wrote: > This drops the muxing of ROMCS[1-3]#, ROMA24. > > I assume they are unused as no other system designs have used them. > > Signed-off-by: Andrew Jeffery <andrew@aj.id.au> > --- > arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts | 5 +++++ > arch/arm/mach-aspeed/aspeed.c | 3 --- > 2 files changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts > index 3bdaaf5008b2..8518bdf529f4 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts > @@ -121,4 +121,9 @@ > > &vuart { > status = "okay"; > +} > + > +&mac0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; > }; > diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c > index 2333670f5c1d..b3aba87964bf 100644 > --- a/arch/arm/mach-aspeed/aspeed.c > +++ b/arch/arm/mach-aspeed/aspeed.c > @@ -103,9 +103,6 @@ static void __init do_garrison_setup(void) > /* Setup PNOR address mapping for 64M flash */ > writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88)); > writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C)); > - > - /* SCU setup */ > - writel(0xd7000000, AST_IO(AST_BASE_SCU | 0x88)); > } > > static void __init do_ast2500evb_setup(void) > -- > 2.9.3 >
On Fri, 2017-04-28 at 09:26 +0800, Lei YU wrote: > Hi Andrew, Joel, > > I was working on a pre-GA Garrison machine which uses PHY as Firestone. > But later it's found out that GA machine uses NCSI. Ah. I'll fix the patch > > I had some patches related to this sent to OpenBMC, which is now abandoned. > So this patch can be dropped Not so much dropped as requesting pinctrl_rmii1_default I think. > , though the lines should be removed as well. > > - > - /* SCU setup */ > - writel(0xd7000000, AST_IO(AST_BASE_SCU | 0x88)); Yes, these will stay removed :) Thanks for the feedback, Andrew
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts index 3bdaaf5008b2..8518bdf529f4 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts @@ -121,4 +121,9 @@ &vuart { status = "okay"; +} + +&mac0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; }; diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c index 2333670f5c1d..b3aba87964bf 100644 --- a/arch/arm/mach-aspeed/aspeed.c +++ b/arch/arm/mach-aspeed/aspeed.c @@ -103,9 +103,6 @@ static void __init do_garrison_setup(void) /* Setup PNOR address mapping for 64M flash */ writel(0x30000C00, AST_IO(AST_BASE_LPC | 0x88)); writel(0xFC0003FF, AST_IO(AST_BASE_LPC | 0x8C)); - - /* SCU setup */ - writel(0xd7000000, AST_IO(AST_BASE_SCU | 0x88)); } static void __init do_ast2500evb_setup(void)
This drops the muxing of ROMCS[1-3]#, ROMA24. I assume they are unused as no other system designs have used them. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> --- arch/arm/boot/dts/aspeed-bmc-opp-garrison.dts | 5 +++++ arch/arm/mach-aspeed/aspeed.c | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-)