From patchwork Tue Apr 25 11:44:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 754770 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wC1cb2NFCz9s8Q for ; Tue, 25 Apr 2017 21:45:51 +1000 (AEST) Received: from localhost ([::1]:48668 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d2yui-0002zT-UB for incoming@patchwork.ozlabs.org; Tue, 25 Apr 2017 07:45:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d2ytV-0002Na-PX for qemu-devel@nongnu.org; Tue, 25 Apr 2017 07:44:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d2ytR-0002Q0-LX for qemu-devel@nongnu.org; Tue, 25 Apr 2017 07:44:33 -0400 Received: from mx2.suse.de ([195.135.220.15]:53367 helo=mx1.suse.de) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d2ytR-0002PJ-EY for qemu-devel@nongnu.org; Tue, 25 Apr 2017 07:44:29 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay1.suse.de (charybdis-ext.suse.de [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 4D659AC39; Tue, 25 Apr 2017 11:44:28 +0000 (UTC) From: Alexander Graf To: qemu-devel@nongnu.org Date: Tue, 25 Apr 2017 13:44:49 +0200 Message-Id: <1493120689-120426-1-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.8.5.6 In-Reply-To: <1493120560-117434-1-git-send-email-agraf@suse.de> References: <1493120560-117434-1-git-send-email-agraf@suse.de> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x (no timestamps) [generic] [fuzzy] X-Received-From: 195.135.220.15 Subject: [Qemu-devel] [PULL 1/2] target-s390x: Mask the SIGP order_code to 8bit. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Philipp Kern Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Philipp Kern According to "CPU Signaling and Response", "Signal-Processor Orders", the order field is bit position 56-63. Without this, the Linux guest kernel is sometimes unable to stop emulation and enters an infinite loop of "XXX unknown sigp: 0xffffffff00000005". Signed-off-by: Philipp Kern Reviewed-by: Thomas Huth [agraf: add comment according to email] Signed-off-by: Alexander Graf --- target/s390x/misc_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 93b0e61..83d3894 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -515,7 +515,8 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1, /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register" as parameter (input). Status (output) is always R1. */ - switch (order_code) { + /* sigp contains the order code in bit positions 56-63, mask it here. */ + switch (order_code & 0xff) { case SIGP_SET_ARCH: /* switch arch */ break;