| Submitter | Becky Bruce |
|---|---|
| Date | Dec. 13, 2010, 9:06 p.m. |
| Message ID | <1292274412-11340-4-git-send-email-beckyb@kernel.crashing.org> |
| Download | mbox | patch |
| Permalink | /patch/75412/ |
| State | Changes Requested |
| Delegated to: | Kumar Gala |
| Headers | show |
Comments
On Dec 13, 2010, at 3:06 PM, Becky Bruce wrote: > Some platforms might want to override the default wimge=0 for > DDR. Add CONFIG_DDR_TLB_WIMGE for those platforms to use. > This will initially only be used by TQM85xx, but could be > useful for other boards or testing going forward. This should be CONFIG_SYS_DDR_MPC85xx_TLB_WIMGE > > Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> > --- > arch/powerpc/cpu/mpc85xx/tlb.c | 6 +++++- > 1 files changed, 5 insertions(+), 1 deletions(-) > > diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c > index e3a71ae..513aaaa 100644 > --- a/arch/powerpc/cpu/mpc85xx/tlb.c > +++ b/arch/powerpc/cpu/mpc85xx/tlb.c > @@ -250,10 +250,14 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg) > { > int i; > unsigned int tlb_size; > + unsigned int wimge = 0; > unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE; > unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf; > u64 size, memsize = (u64)memsize_in_meg << 20; > > +#ifdef CONFIG_DDR_TLB_WIMGE > + wimge = CONFIG_DDR_TLB_WIMGE; > +#endif > size = min(memsize, CONFIG_MAX_MEM_MAPPED); > > /* Convert (4^max) kB to (2^max) bytes */ > @@ -277,7 +281,7 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg) > tlb_size = (camsize - 10) / 2; > > set_tlb(1, ram_tlb_address, p_addr, > - MAS3_SX|MAS3_SW|MAS3_SR, 0, > + MAS3_SX|MAS3_SW|MAS3_SR, wimge, > 0, ram_tlb_index, tlb_size, 1); > > size -= 1ULL << camsize; > -- > 1.5.6.5
Patch
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index e3a71ae..513aaaa 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -250,10 +250,14 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg) { int i; unsigned int tlb_size; + unsigned int wimge = 0; unsigned int ram_tlb_address = (unsigned int)CONFIG_SYS_DDR_SDRAM_BASE; unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xf; u64 size, memsize = (u64)memsize_in_meg << 20; +#ifdef CONFIG_DDR_TLB_WIMGE + wimge = CONFIG_DDR_TLB_WIMGE; +#endif size = min(memsize, CONFIG_MAX_MEM_MAPPED); /* Convert (4^max) kB to (2^max) bytes */ @@ -277,7 +281,7 @@ setup_ddr_tlbs_phys(phys_addr_t p_addr, unsigned int memsize_in_meg) tlb_size = (camsize - 10) / 2; set_tlb(1, ram_tlb_address, p_addr, - MAS3_SX|MAS3_SW|MAS3_SR, 0, + MAS3_SX|MAS3_SW|MAS3_SR, wimge, 0, ram_tlb_index, tlb_size, 1); size -= 1ULL << camsize;
Some platforms might want to override the default wimge=0 for DDR. Add CONFIG_DDR_TLB_WIMGE for those platforms to use. This will initially only be used by TQM85xx, but could be useful for other boards or testing going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> --- arch/powerpc/cpu/mpc85xx/tlb.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-)