From patchwork Fri Apr 21 08:20:55 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kyrill Tkachov X-Patchwork-Id: 753192 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w8TGX215Dz9s65 for ; Fri, 21 Apr 2017 18:21:24 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="xAw9mZ35"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=XQ1Z4UOaTXL2j0tjbpkgjH4vbdabqztegyCyyH/hvCt DTB8/jsP3/kvv3zNqvj3ngy4IzoaWPwSsjSC/ZjG0tEzSk2qHlxjObLjlPSqDQId mb3+LYvxF5E8JtrrPTFnbGli0s+n4XXVRyDhVYYOupYriV5KKo+Qk0DyK0duEbHk = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=7tWtccQwSfYRn0Q4hKadL3x711k=; b=xAw9mZ35lvYggchg0 3rRCCDAu3/rLWmfjkyaVKzNXVFa0HPA0GGdciMcg2o7TIOtzKoCPhWCL23H/juvx uW16ECN6wzQtIePb6uhbwYsELUNkemFcqp5P49oo1jbPmjNyX6DkQ8UdwphGLEyj azpFCZvxWEE/U3bOZbsfGZEc+o= Received: (qmail 79834 invoked by alias); 21 Apr 2017 08:20:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 79750 invoked by uid 89); 21 Apr 2017 08:20:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, KAM_LOTSOFHASH, RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=776 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 21 Apr 2017 08:20:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DEB5715A2; Fri, 21 Apr 2017 01:20:57 -0700 (PDT) Received: from [10.2.207.77] (e100706-lin.cambridge.arm.com [10.2.207.77]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 26F1B3F41F; Fri, 21 Apr 2017 01:20:57 -0700 (PDT) Message-ID: <58F9C0E7.4070600@foss.arm.com> Date: Fri, 21 Apr 2017 09:20:55 +0100 From: Kyrill Tkachov User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.2.0 MIME-Version: 1.0 To: GCC Patches CC: Marcus Shawcroft , Richard Earnshaw , James Greenhalgh Subject: [PATCH][AArch64] Use SUBS for parallel subtraction and comparison with immediate Hi all, Our sub3_compare1 pattern is not enough to catch cases where we subtract an immediate and compare against in PARALLEL. This is due to the RTL canonicalisation rules that require subtractions of immediate IMM be represented as (plus x -IMM). So we need a bit of trickery to catch those cases and this patch does that. It adds a new define_insn to match the plus-negatable-immediate in parallel with a comparison and a peephole that will bring the two together when possible. Otherwise it's pretty straightforward. The testcase in the patch now generates a single SUBS-immediate instead of a SUB followed by a CMP. Bootstrapped and tested on aarch64-none-linux-gnu. Ok for GCC 8? Thanks, Kyrill 2017-04-21 Kyrylo Tkachov * config/aarch64/aarch64.md (sub3_compare1_imm): New define_insn. (peephole2): New peephole2 to emit the above. * config/aarch64/predicates.md (aarch64_sub_immediate): New predicate. 2017-04-21 Kyrylo Tkachov * gcc.target/aarch64/subs_compare_2.c: New test. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 2a0341e1a957ebd28bc9e29465803501be23cd72..ff34e0d5ff4713f7b8005855f62e834aceef51f0 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -2344,6 +2344,19 @@ (define_insn "sub3_compare1" [(set_attr "type" "alus_sreg")] ) +(define_insn "sub3_compare1_imm" + [(set (reg:CC CC_REGNUM) + (compare:CC + (match_operand:GPI 1 "register_operand" "r") + (match_operand:GPI 3 "const_int_operand" "n"))) + (set (match_operand:GPI 0 "register_operand" "=r") + (plus:GPI (match_dup 1) + (match_operand:GPI 2 "aarch64_sub_immediate" "J")))] + "INTVAL (operands[3]) == -INTVAL (operands[2])" + "subs\\t%0, %1, #%n2" + [(set_attr "type" "alus_sreg")] +) + (define_peephole2 [(set (match_operand:GPI 0 "register_operand") (minus:GPI (match_operand:GPI 1 "aarch64_reg_or_zero") @@ -2362,6 +2375,24 @@ (define_peephole2 } ) +(define_peephole2 + [(set (match_operand:GPI 0 "register_operand") + (plus:GPI (match_operand:GPI 1 "register_operand") + (match_operand:GPI 2 "aarch64_sub_immediate"))) + (set (reg:CC CC_REGNUM) + (compare:CC + (match_dup 1) + (match_operand:GPI 3 "const_int_operand")))] + "!reg_overlap_mentioned_p (operands[0], operands[1]) + && INTVAL (operands[3]) == -INTVAL (operands[2])" + [(const_int 0)] + { + emit_insn (gen_sub3_compare1_imm (operands[0], operands[1], + operands[2], operands[3])); + DONE; + } +) + (define_insn "*sub__" [(set (match_operand:GPI 0 "register_operand" "=r") (minus:GPI (match_operand:GPI 3 "register_operand" "r") diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md index 875ae6180e232e25b29c8787c0acf7a5dfa82d94..4bd8f45562c017bca736ae466ede6b9e4de0d17a 100644 --- a/gcc/config/aarch64/predicates.md +++ b/gcc/config/aarch64/predicates.md @@ -77,6 +77,10 @@ (define_predicate "aarch64_fp_pow2" (define_predicate "aarch64_fp_vec_pow2" (match_test "aarch64_vec_fpconst_pow_of_2 (op) > 0")) +(define_predicate "aarch64_sub_immediate" + (and (match_code "const_int") + (match_test "aarch64_uimm12_shift (-INTVAL (op))"))) + (define_predicate "aarch64_plus_immediate" (and (match_code "const_int") (ior (match_test "aarch64_uimm12_shift (INTVAL (op))") diff --git a/gcc/testsuite/gcc.target/aarch64/subs_compare_2.c b/gcc/testsuite/gcc.target/aarch64/subs_compare_2.c new file mode 100644 index 0000000000000000000000000000000000000000..60c6d9e5ccd8fce42c388c831a8060dead128491 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/subs_compare_2.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (int a, int b) +{ + int x = a - 4; + if (a < 4) + return x; + else + return 0; +} + +/* { dg-final { scan-assembler-times "subs\\tw\[0-9\]+, w\[0-9\]+, #4" 1 } } */ +/* { dg-final { scan-assembler-not "cmp\\tw\[0-9\]+, w\[0-9\]+" } } */