[U-Boot,7/7] rockchip: rk3368: add Sheep board

Submitted by Andy Yan on April 21, 2017, 2:33 a.m.

Details

Message ID 1492742026-7899-1-git-send-email-andy.yan@rock-chips.com
State Superseded
Delegated to: Simon Glass
Headers show

Commit Message

Andy Yan April 21, 2017, 2:33 a.m.
Sheep board is designed by Rockchip as a EVB for rk3368.
Currently it is able to boot a linux kernel and system
to console with the miniloader run as fist level loader.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 arch/arm/dts/Makefile                      |   1 +
 arch/arm/dts/rk3368-sheep.dts              | 283 +++++++++++++++++++++++++++++
 arch/arm/mach-rockchip/rk3368/Kconfig      |   8 +-
 board/rockchip/sheep_rk3368/Kconfig        |  15 ++
 board/rockchip/sheep_rk3368/MAINTAINERS    |   6 +
 board/rockchip/sheep_rk3368/Makefile       |   7 +
 board/rockchip/sheep_rk3368/sheep_rk3368.c |  37 ++++
 configs/sheep-rk3368_defconfig             |  28 +++
 include/configs/sheep_rk3368.h             |  22 +++
 9 files changed, 406 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/rk3368-sheep.dts
 create mode 100644 board/rockchip/sheep_rk3368/Kconfig
 create mode 100644 board/rockchip/sheep_rk3368/MAINTAINERS
 create mode 100644 board/rockchip/sheep_rk3368/Makefile
 create mode 100644 board/rockchip/sheep_rk3368/sheep_rk3368.c
 create mode 100644 configs/sheep-rk3368_defconfig
 create mode 100644 include/configs/sheep_rk3368.h

Comments

Simon Glass April 29, 2017, 12:26 a.m.
On 20 April 2017 at 20:33, Andy Yan <andy.yan@rock-chips.com> wrote:
> Sheep board is designed by Rockchip as a EVB for rk3368.
> Currently it is able to boot a linux kernel and system
> to console with the miniloader run as fist level loader.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
> ---
>
>  arch/arm/dts/Makefile                      |   1 +
>  arch/arm/dts/rk3368-sheep.dts              | 283 +++++++++++++++++++++++++++++
>  arch/arm/mach-rockchip/rk3368/Kconfig      |   8 +-
>  board/rockchip/sheep_rk3368/Kconfig        |  15 ++
>  board/rockchip/sheep_rk3368/MAINTAINERS    |   6 +
>  board/rockchip/sheep_rk3368/Makefile       |   7 +
>  board/rockchip/sheep_rk3368/sheep_rk3368.c |  37 ++++
>  configs/sheep-rk3368_defconfig             |  28 +++
>  include/configs/sheep_rk3368.h             |  22 +++
>  9 files changed, 406 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/rk3368-sheep.dts
>  create mode 100644 board/rockchip/sheep_rk3368/Kconfig
>  create mode 100644 board/rockchip/sheep_rk3368/MAINTAINERS
>  create mode 100644 board/rockchip/sheep_rk3368/Makefile
>  create mode 100644 board/rockchip/sheep_rk3368/sheep_rk3368.c
>  create mode 100644 configs/sheep-rk3368_defconfig
>  create mode 100644 include/configs/sheep_rk3368.h

Reviewed-by: Simon Glass <sjg@chromium.org>

Patch hide | download patch | download mbox

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d786611..caad028 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -42,6 +42,7 @@  dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rk3288-veyron-minnie.dtb \
 	rk3328-evb.dtb \
 	rk3368-geekbox.dtb \
+	rk3368-sheep.dtb \
 	rk3368-px5-evb.dtb \
 	rk3399-evb.dtb \
 	rk3399-puma.dtb \
diff --git a/arch/arm/dts/rk3368-sheep.dts b/arch/arm/dts/rk3368-sheep.dts
new file mode 100644
index 0000000..e2f37ed
--- /dev/null
+++ b/arch/arm/dts/rk3368-sheep.dts
@@ -0,0 +1,283 @@ 
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+/dts-v1/;
+#include "rk3368.dtsi"
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Rockchip sheep board";
+	compatible = "rockchip,sheep", "rockchip,rk3368";
+
+	chosen {
+		stdout-path = "serial3:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	ext_gmac: gmac-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "ext_gmac";
+		#clock-cells = <0>;
+	};
+
+	ir: ir-receiver {
+		compatible = "gpio-ir-receiver";
+		gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&ir_int>;
+	};
+
+	keys: gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key>;
+
+		power {
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			label = "GPIO Power";
+			linux,code = <KEY_POWER>;
+			wakeup-source;
+		};
+	};
+
+	leds: gpio-leds {
+		compatible = "gpio-leds";
+
+		blue {
+			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
+			label = "geekbox:blue:led";
+			default-state = "on";
+		};
+
+		red {
+			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
+			label = "geekbox:red:led";
+			default-state = "off";
+		};
+	};
+
+	vcc_sys: vcc-sys-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-always-on;
+		regulator-boot-on;
+	};
+};
+
+&emmc {
+	status = "okay";
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	clock-frequency = <150000000>;
+	disable-wp;
+	keep-power-in-suspend;
+	non-removable;
+	num-slots = <1>;
+	vmmc-supply = <&vcc_io>;
+	vqmmc-supply = <&vcc18_flash>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
+};
+
+&gmac {
+	status = "okay";
+	phy-supply = <&vcc_lan>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	assigned-clocks = <&cru SCLK_MAC>;
+	assigned-clock-parents = <&ext_gmac>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	tx_delay = <0x30>;
+	rx_delay = <0x10>;
+};
+
+&i2c0 {
+	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int>, <&pmic_sleep>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
+		rockchip,system-power-controller;
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc6-supply = <&vcc_sys>;
+		vcc7-supply = <&vcc_sys>;
+		vcc8-supply = <&vcc_io>;
+		vcc9-supply = <&vcc_sys>;
+		vcc10-supply = <&vcc_sys>;
+		vcc11-supply = <&vcc_sys>;
+		vcc12-supply = <&vcc_io>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+		#clock-cells = <1>;
+
+		regulators {
+			vdd_cpu: DCDC_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-name = "vdd_cpu";
+			};
+
+			vdd_log: DCDC_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-name = "vdd_log";
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_ddr";
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc_io";
+			};
+
+			vcc18_flash: LDO_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc18_flash";
+			};
+
+			vcc33_lcd: LDO_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vcc33_lcd";
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vdd_10";
+			};
+
+			vcca_18: LDO_REG4 {
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcca_18";
+			};
+
+			vccio_sd: LDO_REG5 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-name = "vccio_sd";
+			};
+
+			vdd10_lcd: LDO_REG6 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-name = "vdd10_lcd";
+			};
+
+			vcc_18: LDO_REG7 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc_18";
+			};
+
+			vcc18_lcd: LDO_REG8 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-name = "vcc18_lcd";
+			};
+
+			vcc_sd: SWITCH_REG1 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_sd";
+			};
+
+			vcc_lan: SWITCH_REG2 {
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-name = "vcc_lan";
+			};
+		};
+	};
+};
+
+&pinctrl {
+	ir {
+		ir_int: ir-int {
+			rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	keys {
+		pwr_key: pwr-key {
+			rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_sleep: pmic-sleep {
+			rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>;
+		};
+
+		pmic_int: pmic-int {
+			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+};
+
+&tsadc {
+	status = "okay";
+	rockchip,hw-tshut-mode = <0>; /* CRU */
+	rockchip,hw-tshut-polarity = <1>; /* high */
+};
+
+&uart4 {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_otg {
+	status = "okay";
+};
+
+&wdt {
+	status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig
index 693d538..4d3ad6a 100644
--- a/arch/arm/mach-rockchip/rk3368/Kconfig
+++ b/arch/arm/mach-rockchip/rk3368/Kconfig
@@ -6,6 +6,12 @@  choice
 config TARGET_GEEKBOX
 	bool "GeekBox"
 
+config TARGET_SHEEP
+	bool "Sheep board"
+	help
+	  Sheep board is designed by Rockchip as a EVB board
+	  for rk3368.
+
 config TARGET_EVB_PX5
         bool "Evb-PX5"
         help
@@ -23,6 +29,6 @@  config SYS_MALLOC_F_LEN
 	default 0x0800
 
 source "board/geekbuying/geekbox/Kconfig"
+source "board/rockchip/sheep_rk3368/Kconfig"
 source "board/rockchip/evb_px5/Kconfig"
-
 endif
diff --git a/board/rockchip/sheep_rk3368/Kconfig b/board/rockchip/sheep_rk3368/Kconfig
new file mode 100644
index 0000000..d39b5e8
--- /dev/null
+++ b/board/rockchip/sheep_rk3368/Kconfig
@@ -0,0 +1,15 @@ 
+if TARGET_SHEEP
+
+config SYS_BOARD
+	default "sheep_rk3368"
+
+config SYS_VENDOR
+	default "rockchip"
+
+config SYS_CONFIG_NAME
+	default "sheep_rk3368"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+
+endif
diff --git a/board/rockchip/sheep_rk3368/MAINTAINERS b/board/rockchip/sheep_rk3368/MAINTAINERS
new file mode 100644
index 0000000..bde0648
--- /dev/null
+++ b/board/rockchip/sheep_rk3368/MAINTAINERS
@@ -0,0 +1,6 @@ 
+PX5 EVB
+M:	Andy Yan <andy.yan@rock-chips.com>
+S:	Maintained
+F:	board/rockchip/sheep_rk3368
+F:	include/configs/sheep_rk3368.h
+F:	configs/sheep-rk3368_defconfig
diff --git a/board/rockchip/sheep_rk3368/Makefile b/board/rockchip/sheep_rk3368/Makefile
new file mode 100644
index 0000000..a38b9ce
--- /dev/null
+++ b/board/rockchip/sheep_rk3368/Makefile
@@ -0,0 +1,7 @@ 
+#
+# Copyright (c) 2017 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	+= sheep_rk3368.o
diff --git a/board/rockchip/sheep_rk3368/sheep_rk3368.c b/board/rockchip/sheep_rk3368/sheep_rk3368.c
new file mode 100644
index 0000000..df1fd9d
--- /dev/null
+++ b/board/rockchip/sheep_rk3368/sheep_rk3368.c
@@ -0,0 +1,37 @@ 
+/*
+ * Copyright (c) 2017 Andy Yan
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/grf_rk3368.h>
+#include <syscon.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mach_cpu_init(void)
+{
+	return 0;
+}
+
+int board_init(void)
+{
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = 0x80000000;
+
+	return 0;
+}
+
+int dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = 0x200000;
+	gd->bd->bi_dram[0].size = 0x7fe00000;
+
+	return 0;
+}
diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig
new file mode 100644
index 0000000..73c59b7
--- /dev/null
+++ b/configs/sheep-rk3368_defconfig
@@ -0,0 +1,28 @@ 
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_ROCKCHIP_RK3368=y
+CONFIG_TARGET_SHEEP=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep"
+CONFIG_HUSH_PARSER=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_FASTBOOT=y
+CONFIG_ANDROID_BOOT_IMAGE=y
+# CONFIG_CMD_IMLS is not set
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_BOOTRK=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SYSRESET=y
+CONFIG_PINCTRL=y
+CONFIG_ROCKCHIP_RK3368_PINCTRL=y
+CONFIG_RAM=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_BASE=0xFF1b0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/sheep_rk3368.h b/include/configs/sheep_rk3368.h
new file mode 100644
index 0000000..ef0befd
--- /dev/null
+++ b/include/configs/sheep_rk3368.h
@@ -0,0 +1,22 @@ 
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIGS_PX5_EVB_H
+#define __CONFIGS_PX5_EVB_H
+
+#include <configs/rk3368_common.h>
+
+#define CONFIG_SYS_MMC_ENV_DEV		0
+#define KERNEL_LOAD_ADDR		0x280000
+#define DTB_LOAD_ADDR			0x5600000
+#define INITRD_LOAD_ADDR		0x5bf0000
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE			0x2000
+
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_CONSOLE_SCROLL_LINES	10
+
+#endif