[U-Boot,4/7] rockchip: rk3368: Add sysreset driver

Submitted by Andy Yan on April 21, 2017, 2:32 a.m.

Details

Message ID 1492741933-7734-1-git-send-email-andy.yan@rock-chips.com
State Superseded
Delegated to: Simon Glass
Headers show

Commit Message

Andy Yan April 21, 2017, 2:32 a.m.
Add sysreset driver to reset rk3368 SOC.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 drivers/sysreset/Makefile          |  1 +
 drivers/sysreset/sysreset_rk3368.c | 58 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 59 insertions(+)
 create mode 100644 drivers/sysreset/sysreset_rk3368.c

Comments

Simon Glass April 29, 2017, 12:26 a.m.
On 20 April 2017 at 20:32, Andy Yan <andy.yan@rock-chips.com> wrote:
> Add sysreset driver to reset rk3368 SOC.
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
> ---
>
>  drivers/sysreset/Makefile          |  1 +
>  drivers/sysreset/sysreset_rk3368.c | 58 ++++++++++++++++++++++++++++++++++++++
>  2 files changed, 59 insertions(+)
>  create mode 100644 drivers/sysreset/sysreset_rk3368.c

Reviewed-by: Simon Glass <sjg@chromium.org>

Patch hide | download patch | download mbox

diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index 49b8bb6..ffc61c3 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -12,6 +12,7 @@  endif
 obj-$(CONFIG_ROCKCHIP_RK3188) += sysreset_rk3188.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += sysreset_rk3288.o
 obj-$(CONFIG_ROCKCHIP_RK3328) += sysreset_rk3328.o
+obj-$(CONFIG_ROCKCHIP_RK3368) += sysreset_rk3368.o
 obj-$(CONFIG_ROCKCHIP_RK3399) += sysreset_rk3399.o
 obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
 obj-$(CONFIG_ARCH_SNAPDRAGON) += sysreset_snapdragon.o
diff --git a/drivers/sysreset/sysreset_rk3368.c b/drivers/sysreset/sysreset_rk3368.c
new file mode 100644
index 0000000..32ebc47
--- /dev/null
+++ b/drivers/sysreset/sysreset_rk3368.c
@@ -0,0 +1,58 @@ 
+/*
+ * (C) Copyright Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:	GPL-2.0
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <sysreset.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/cru_rk3368.h>
+#include <asm/arch/hardware.h>
+#include <linux/err.h>
+
+static void rk3368_pll_enter_slow_mode(struct rk3368_cru *cru)
+{
+	struct rk3368_pll *pll;
+	int i;
+
+	for (i = 0; i < 6; i++) {
+		pll = &cru->pll[i];
+		rk_clrreg(&pll->con3, PLL_MODE_MASK);
+	}
+}
+
+static int rk3368_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	struct rk3368_cru *cru = rockchip_get_cru();
+
+	if (IS_ERR(cru))
+		return PTR_ERR(cru);
+	switch (type) {
+	case SYSRESET_WARM:
+		rk3368_pll_enter_slow_mode(cru);
+		writel(0xeca8, &cru->glb_srst_snd_val);
+		break;
+	case SYSRESET_COLD:
+		rk3368_pll_enter_slow_mode(cru);
+		writel(0xfdb9, &cru->glb_srst_fst_val);
+		break;
+	default:
+		return -EPROTONOSUPPORT;
+	}
+
+	return -EINPROGRESS;
+}
+
+static struct sysreset_ops rk3368_sysreset = {
+	.request	= rk3368_sysreset_request,
+};
+
+U_BOOT_DRIVER(sysreset_rk3368) = {
+	.name	= "rk3368_sysreset",
+	.id	= UCLASS_SYSRESET,
+	.ops	= &rk3368_sysreset,
+};