From patchwork Thu Apr 20 15:59:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Wilco Dijkstra X-Patchwork-Id: 752864 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w83VF52dmz9s7L for ; Fri, 21 Apr 2017 02:00:05 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="sxyMyWKu"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:references:in-reply-to :content-type:content-transfer-encoding:mime-version; q=dns; s= default; b=ifk74TBIbmrWJ3iRAFWCgRGH1o2usE7lStM9g2CI90Zb8VzIhprPB PmdtxSmoeIdQF6xhuzfoajLfGRPVbaUasRluKy3E9jmmm/2c9Uz9Ypr0WkyqUA4E 262l5SGaSgrwyq8/6K5NIkioxXU4m+azDjJuVFbqXG91GcY7b+/9TY= DKIM-Signature: v=1; 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Thu, 20 Apr 2017 15:59:49 +0000 Received: from AM5PR0802MB2610.eurprd08.prod.outlook.com (10.175.46.18) by AM5PR0802MB2388.eurprd08.prod.outlook.com (10.175.43.150) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1047.13; Thu, 20 Apr 2017 15:59:48 +0000 Received: from AM5PR0802MB2610.eurprd08.prod.outlook.com ([10.175.46.18]) by AM5PR0802MB2610.eurprd08.prod.outlook.com ([10.175.46.18]) with mapi id 15.01.1047.013; Thu, 20 Apr 2017 15:59:48 +0000 From: Wilco Dijkstra To: GCC Patches , Kyrylo Tkachov CC: nd , Richard Earnshaw Subject: Re: [PATCH][ARM] Remove Thumb-2 iordi_not patterns Date: Thu, 20 Apr 2017 15:59:47 +0000 Message-ID: References: In-Reply-To: authentication-results: arm.com; dkim=none (message not signed) header.d=none; arm.com; dmarc=none action=none header.from=arm.com; x-microsoft-exchange-diagnostics: 1; AM5PR0802MB2388; 7:v5vuCy1HpxF1WcDEFwmlykf8n0dsLicw/yGGPVXqwq8gtAcDO0GwFSVoO0MiHR45leMWYQA+7jML1u2ETQzfbr8tKmZlP/NGsUiPc0yIhT3XUL10z4o8zlQ6TyWwgTX+sAtezztQbJXGKp6JEYFlMwnCRn6aTmUPcIfwQde7fyV8/uk5gbzWezRnz2N7QGkGhYy4yDTAxaXUtivmRG5zulonpMqHvOguhsxoCfCgs6FSHYGKIA5cc9TtMnBaudt+M95cVNmUv3ncAqGcf48kOj8Krt3v3+NdyLrwxflGboZla+HVbkitW38hCSK6pJrmeYIjJzdwnDIK6o08NsIJpQ== x-ms-office365-filtering-correlation-id: c6b55f97-4638-4391-90f9-08d488064558 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM5PR0802MB2388; H:AM5PR0802MB2610.eurprd08.prod.outlook.com; FPR:; SPF:None; MLV:sfv; LANG:en; spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Apr 2017 15:59:47.9705 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM5PR0802MB2388 ping From: Wilco Dijkstra Sent: 17 January 2017 18:00 To: GCC Patches Cc: nd; Kyrylo Tkachov; Richard Earnshaw Subject: [PATCH][ARM] Remove Thumb-2 iordi_not patterns   After Bernd's DImode patch [1] almost all DImode operations are expanded early (except for -mfpu=neon). This means the Thumb-2 iordi_notdi_di patterns are no longer used - the split ORR and NOT instructions are merged into ORN by Combine.  With -mfpu=neon the iordi_notdi_di patterns are used on Thumb-2, and after this patch the orndi3_neon pattern matches instead (which still emits ORN).  After this there are no Thumb-2 specific DImode patterns. [1] https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02796.html ChangeLog: 2017-01-17  Wilco Dijkstra          * config/arm/thumb2.md (iordi_notdi_di): Remove pattern.         (iordi_notzesidi_di): Likewise.         (iordi_notdi_zesidi): Likewise.         (iordi_notsesidi_di): Likewise. diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 2e7580f220eae1524fef69719b1796f50f5cf27c..91471d4650ecae4f4e87b549d84d11adf3014ad2 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -1434,103 +1434,6 @@     (set_attr "type" "alu_sreg")]  )   -; Constants for op 2 will never be given to these patterns. -(define_insn_and_split "*iordi_notdi_di" -  [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") -       (ior:DI (not:DI (match_operand:DI 1 "s_register_operand" "0,r")) -               (match_operand:DI 2 "s_register_operand" "r,0")))] -  "TARGET_THUMB2" -  "#" -  "TARGET_THUMB2 && reload_completed" -  [(set (match_dup 0) (ior:SI (not:SI (match_dup 1)) (match_dup 2))) -   (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))] -  " -  { -    operands[3] = gen_highpart (SImode, operands[0]); -    operands[0] = gen_lowpart (SImode, operands[0]); -    operands[4] = gen_highpart (SImode, operands[1]); -    operands[1] = gen_lowpart (SImode, operands[1]); -    operands[5] = gen_highpart (SImode, operands[2]); -    operands[2] = gen_lowpart (SImode, operands[2]); -  }" -  [(set_attr "length" "8") -   (set_attr "predicable" "yes") -   (set_attr "predicable_short_it" "no") -   (set_attr "type" "multiple")] -) - -(define_insn_and_split "*iordi_notzesidi_di" -  [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") -       (ior:DI (not:DI (zero_extend:DI -                        (match_operand:SI 2 "s_register_operand" "r,r"))) -               (match_operand:DI 1 "s_register_operand" "0,?r")))] -  "TARGET_THUMB2" -  "#" -  ; (not (zero_extend...)) means operand0 will always be 0xffffffff -  "TARGET_THUMB2 && reload_completed" -  [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) -   (set (match_dup 3) (const_int -1))] -  " -  { -    operands[3] = gen_highpart (SImode, operands[0]); -    operands[0] = gen_lowpart (SImode, operands[0]); -    operands[1] = gen_lowpart (SImode, operands[1]); -  }" -  [(set_attr "length" "4,8") -   (set_attr "predicable" "yes") -   (set_attr "predicable_short_it" "no") -   (set_attr "type" "multiple")] -) - -(define_insn_and_split "*iordi_notdi_zesidi" -  [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") -       (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "0,?r")) -               (zero_extend:DI -                (match_operand:SI 1 "s_register_operand" "r,r"))))] -  "TARGET_THUMB2" -  "#" -  "TARGET_THUMB2 && reload_completed" -  [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) -   (set (match_dup 3) (not:SI (match_dup 4)))] -  " -  { -    operands[3] = gen_highpart (SImode, operands[0]); -    operands[0] = gen_lowpart (SImode, operands[0]); -    operands[1] = gen_lowpart (SImode, operands[1]); -    operands[4] = gen_highpart (SImode, operands[2]); -    operands[2] = gen_lowpart (SImode, operands[2]); -  }" -  [(set_attr "length" "8") -   (set_attr "predicable" "yes") -   (set_attr "predicable_short_it" "no") -   (set_attr "type" "multiple")] -) - -(define_insn_and_split "*iordi_notsesidi_di" -  [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") -       (ior:DI (not:DI (sign_extend:DI -                        (match_operand:SI 2 "s_register_operand" "r,r"))) -               (match_operand:DI 1 "s_register_operand" "0,r")))] -  "TARGET_THUMB2" -  "#" -  "TARGET_THUMB2 && reload_completed" -  [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1))) -   (set (match_dup 3) (ior:SI (not:SI -                               (ashiftrt:SI (match_dup 2) (const_int 31))) -                              (match_dup 4)))] -  " -  { -    operands[3] = gen_highpart (SImode, operands[0]); -    operands[0] = gen_lowpart (SImode, operands[0]); -    operands[4] = gen_highpart (SImode, operands[1]); -    operands[1] = gen_lowpart (SImode, operands[1]); -  }" -  [(set_attr "length" "8") -   (set_attr "predicable" "yes") -   (set_attr "predicable_short_it" "no") -   (set_attr "type" "multiple")] -) -  (define_insn "*orsi_notsi_si"    [(set (match_operand:SI 0 "s_register_operand" "=r")          (ior:SI (not:SI (match_operand:SI 2 "s_register_operand" "r"))