From patchwork Wed Apr 19 13:24:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 752273 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3w7N640ck8z9ryT for ; Wed, 19 Apr 2017 23:25:16 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qc5t+4ru"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763647AbdDSNZP (ORCPT ); Wed, 19 Apr 2017 09:25:15 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:33663 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1763594AbdDSNZO (ORCPT ); Wed, 19 Apr 2017 09:25:14 -0400 Received: by mail-wr0-f193.google.com with SMTP id l28so3227244wre.0; Wed, 19 Apr 2017 06:25:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ASwxdGS8NB8DWwass15YeZDaOb7lCW5XBuTQBjSwW+U=; b=qc5t+4rucmu6aIKqoC/TS7yHWP1kM6dvlYrpKL5SJSo6Vzr7hyKGMTFIoTrXnOTlbs w/ITl/ONSZ0wr0vZsxh1ZXJVxn5QDSubvGSWBRvQq2Sc4E14PimzfVBz4UcovjND5HT2 dQwIad2FNnfouYeKrvyDBsURnBTRogmc9JRht5cqLKxKTUIw9CiUZkgdAtfBjAKxi+gN BhFRsJvYFobxssoXNroJleGA8RjHXOsaIbWC7xBSStnKFgCm3bykQeacgDCzowHZ5U/z ALAj9Kq41zRQu+3BUILlXIuWETfriRe6+Qz7vGC8vHs/cFY4VX0QUqkfGzyL+VJedob8 OVcg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=ASwxdGS8NB8DWwass15YeZDaOb7lCW5XBuTQBjSwW+U=; b=oOk/2JmXyyNor/dKIbFDfWryTj0iYnqFXdMucU+mO9RarcGgCp0cExQ6FVZnWzboKY BTFIeQtt+JzJc2874L+RxlGHZHuUt+X0sjMdZ/lQiHE19tCZTp8NwZDL1/NpN26u5AQr T7xvnhzsZR1OjZtKq8kBhCSksm4FDswSIGTGcv+LOGRsQpYtn5gF7fPwzQQL15S80XvA R8KM4TNqezIzBIEI+4m9tL1SA97n9NXtHbUcPZF54LEhWSUZDblbIo3zlgFCYW8l24lx KS+QhPXdB8H4qMg/cXp0fCybRGyZfg2w4o0UUM0pHa0uRMa/yn+Qcgy+g0i8LLkdTH68 BXCQ== X-Gm-Message-State: AN3rC/4FbtPx3cnAZa1SrzklP/kbCwZhIH3wi+8e+ZYx/nPZdq/vYAMh inevpe77/mgcSA== X-Received: by 10.223.162.152 with SMTP id s24mr3191152wra.27.1492608313537; Wed, 19 Apr 2017 06:25:13 -0700 (PDT) Received: from groucho.site (ipbcc0294b.dynamic.kabel-deutschland.de. [188.192.41.75]) by smtp.gmail.com with ESMTPSA id 11sm3353784wrz.8.2017.04.19.06.25.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Apr 2017 06:25:12 -0700 (PDT) From: Ulrich Hecht To: geert@glider.be, horms@verge.net.au Cc: linux-pwm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, magnus.damm@gmail.com, Takeshi Kihara , Ulrich Hecht Subject: [PATCH 5/5] arm64: dts: r8a7795-salvator-x: Enable PWM Date: Wed, 19 Apr 2017 15:24:53 +0200 Message-Id: <1492608293-12435-6-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492608293-12435-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1492608293-12435-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Takeshi Kihara This patch enables PWM{1,2} for Salvator-X board on R8A7795 SoC. Signed-off-by: Takeshi Kihara Signed-off-by: Ulrich Hecht --- arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts index bf4674e..842b0dd 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts @@ -282,6 +282,18 @@ }; }; +&pwm1 { + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pwm2 { + pinctrl-0 = <&pwm2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &du { pinctrl-0 = <&du_pins>; pinctrl-names = "default"; @@ -324,6 +336,16 @@ pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; + pwm1_pins: pwm1 { + groups = "pwm1_a", "pwm1_b"; + function = "pwm1"; + }; + + pwm2_pins: pwm2 { + groups = "pwm2_a", "pwm2_b"; + function = "pwm2"; + }; + scif1_pins: scif1 { groups = "scif1_data_a", "scif1_ctrl"; function = "scif1";