From patchwork Wed Apr 19 13:24:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 752272 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3w7N622Gj6z9s2P for ; Wed, 19 Apr 2017 23:25:14 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="DqtGUl+Y"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763637AbdDSNZN (ORCPT ); Wed, 19 Apr 2017 09:25:13 -0400 Received: from mail-wr0-f196.google.com ([209.85.128.196]:33648 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1763594AbdDSNZN (ORCPT ); Wed, 19 Apr 2017 09:25:13 -0400 Received: by mail-wr0-f196.google.com with SMTP id l28so3227165wre.0; Wed, 19 Apr 2017 06:25:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=rrndmTSK1hh1xVEKKM7z+HjWdNKAMm9k96y8v1ifk64=; b=DqtGUl+YwPLbgwuBl+S0lxEGlYWoP9nDR7hO77ybiISF61jb44pTl5kgSbQc+U9VnI /saW9vKiLKYEDwTu7pUdpCCkAH0WtPePAeLScNh6FLArSDNDJ4u4bYk7E1UL/Xqnt2S0 BW1fbjAD7S2XEZn2RSqsWx5CmgNpUTedKw/bM46J5QuTRndc5ntrnnCJaQH0908sb6+E tguo8n5BW7JW7b/5NYarNkJ2h1dwi7jSrppxTFpHQeG+OSVU8InIpx+QSZaZGelJk0Bh aZwlnwuCY/187qCRRf+Yvc3VKVeSfUoD860XkgQKTaqDneCyF3Rj/CXLKCV0MwQE7S5f PEeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=rrndmTSK1hh1xVEKKM7z+HjWdNKAMm9k96y8v1ifk64=; b=b0PJfFEecMsouLKhvoB9QiuB6kogZmYCC6HC+D633HMpOmsgyd2J4+IBw7D1Zb9qat QUiWi3mUXtQ0+LfIqlWMWCnH7hfaukCBxjJ+jSR1rZkkrny91y1h184EzSuPhdN6r3Yo iVfVNJPd3JyImX4IGeF/VbyWe3qLfY5N9nEyyAM823lX3vyk2cc6Vw+vdnLURSb986qO LKL7cp4w0ask1ATwXoLaLU7bf+mpcM/v1vFJjfDK7Cs90/qOHJPQ8AWBdOE8PAw2w5iT pInO2eUXQdQnFNZXRwl1aJSe4NpttnpN4PXm25fPGKSpqKEfTMckpJZ92TnJ6OU5ycRi pCEg== X-Gm-Message-State: AN3rC/4fNWmK376GGgEIq2ScWzvtxBKi29RihUMkmHusP7h0RSt4MakG otXayhEoc3g+3Q== X-Received: by 10.223.169.226 with SMTP id b89mr3124769wrd.100.1492608311652; Wed, 19 Apr 2017 06:25:11 -0700 (PDT) Received: from groucho.site (ipbcc0294b.dynamic.kabel-deutschland.de. [188.192.41.75]) by smtp.gmail.com with ESMTPSA id 11sm3353784wrz.8.2017.04.19.06.25.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Apr 2017 06:25:10 -0700 (PDT) From: Ulrich Hecht To: geert@glider.be, horms@verge.net.au Cc: linux-pwm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, magnus.damm@gmail.com, Ryo Kodama , Takeshi Kihara , Ulrich Hecht Subject: [PATCH 4/5] arm64: dts: r8a7796-salvator-x: Add PWM device support Date: Wed, 19 Apr 2017 15:24:52 +0200 Message-Id: <1492608293-12435-5-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492608293-12435-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1492608293-12435-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Ryo Kodama This patch adds support of PWM{1,2} device for Salvator-X board on R8A7796 SoC. Signed-off-by: Ryo Kodama Signed-off-by: Takeshi Kihara Signed-off-by: Ulrich Hecht --- arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts index 14d9e51..b4ff1b6 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts +++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts @@ -105,6 +105,18 @@ }; }; +&pwm1 { + pinctrl-0 = <&pwm1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pwm2 { + pinctrl-0 = <&pwm2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default"; @@ -114,6 +126,15 @@ function = "avb"; }; + pwm1_pins: pwm1 { + groups = "pwm1_a", "pwm1_b"; + function = "pwm1"; + }; + pwm2_pins: pwm2 { + groups = "pwm2_a", "pwm2_b"; + function = "pwm2"; + }; + scif1_pins: scif1 { groups = "scif1_data_a", "scif1_ctrl"; function = "scif1";