From patchwork Wed Apr 19 13:24:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulrich Hecht X-Patchwork-Id: 752270 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3w7N5y228Kz9s2x for ; Wed, 19 Apr 2017 23:25:10 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Pwh5E+RS"; dkim-atps=neutral Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763599AbdDSNZJ (ORCPT ); Wed, 19 Apr 2017 09:25:09 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:35184 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1763594AbdDSNZJ (ORCPT ); Wed, 19 Apr 2017 09:25:09 -0400 Received: by mail-wm0-f68.google.com with SMTP id d79so4977401wmi.2; Wed, 19 Apr 2017 06:25:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=+rsHn2LchjaR87lyAi04zG++xgBWkP+9yMimYhpB1qg=; b=Pwh5E+RSkNsbdVTnTGFK+IYUhJ9je+6U12PWAqRhUJ92Jg+U9V1C2H53JaCOtc5C95 koSuityYUhmWqyVgMxzOzEPeYGK5oLEIQS3zTMdbnnJtTGYNsbl5zpT+1klCu6ejXY4a LF30NaY0XhJDI75M9KNvYVLJKvuYpto9LAka8o0eIwTq3EQB6N55WsJ4pL5arzp4dL1F XmN2mkeJ/+kImFgAUMX4ARBekfTtqXpyvILjD+5XK0R1s1ggpKR6EZwpaYQwMOSGJ3IF rvPRIKNEAGAfPR2y2aJ8h3bcJzljvR+cLrqExN5zdxmziSFbjpllQUy5rqzKRhVETCLQ gWQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=+rsHn2LchjaR87lyAi04zG++xgBWkP+9yMimYhpB1qg=; b=Q8cay780GdBElSZmg/XB0i/KMiV3OTxWNBGgcqoOdv7xTkM/DwsRneKlM2gkzv31D+ +J6gFVg5VMxmYXsAGdRx2vvHptT0vpWT7grlCuiWuNC5Av2v+liZ5OeRi+s34acRm1B5 mAv5eHM12tbFmTS5YDeiEKfVBsB8ranSR/YFEZtckkfQN4HgbAl0DDkDhNtJzYI6j79d WtA/pf81s5Q9wX8hqLeIth5KSCxzNZYK6XJPifSjpgsaZB1blbdpcYWuqeMWvDfO6sta oPONAu5pscJu+eKi/gaNYvVwInNe0N85nA6dBWEc44J02aGhFN6go6DYXWjneB63ycNQ AP9w== X-Gm-Message-State: AN3rC/4P1w5LGiIK9MZI4tLKWzHBBKHkOdLLC0v2EGRHYLj/b5mzHkLg IZro41AVJp/WCyoFQ6c= X-Received: by 10.28.159.136 with SMTP id i130mr2902486wme.29.1492608307421; Wed, 19 Apr 2017 06:25:07 -0700 (PDT) Received: from groucho.site (ipbcc0294b.dynamic.kabel-deutschland.de. [188.192.41.75]) by smtp.gmail.com with ESMTPSA id 11sm3353784wrz.8.2017.04.19.06.25.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Apr 2017 06:25:06 -0700 (PDT) From: Ulrich Hecht To: geert@glider.be, horms@verge.net.au Cc: linux-pwm@vger.kernel.org, linux-renesas-soc@vger.kernel.org, magnus.damm@gmail.com, Ryo Kodama , Takeshi Kihara , Ulrich Hecht Subject: [PATCH 2/5] clk: renesas: r8a7796: add PWM clock Date: Wed, 19 Apr 2017 15:24:50 +0200 Message-Id: <1492608293-12435-3-git-send-email-ulrich.hecht+renesas@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1492608293-12435-1-git-send-email-ulrich.hecht+renesas@gmail.com> References: <1492608293-12435-1-git-send-email-ulrich.hecht+renesas@gmail.com> Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: Ryo Kodama This patch adds PWM clock for PWM. Signed-off-by: Ryo Kodama Signed-off-by: Takeshi Kihara Signed-off-by: Ulrich Hecht --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 9d114b3..be0fc00 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -151,6 +151,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("hscif1", 519, R8A7796_CLK_S3D1), DEF_MOD("hscif0", 520, R8A7796_CLK_S3D1), DEF_MOD("thermal", 522, R8A7796_CLK_CP), + DEF_MOD("pwm", 523, R8A7796_CLK_S3D4), DEF_MOD("fcpvd2", 601, R8A7796_CLK_S0D2), DEF_MOD("fcpvd1", 602, R8A7796_CLK_S0D2), DEF_MOD("fcpvd0", 603, R8A7796_CLK_S0D2),