===================================================================
@@ -373,6 +373,7 @@ (define_predicate "input_operand"
if (TARGET_ARCH32 && mode == DImode && GET_CODE (op) == CONST_INT)
return true;
+ /* Allow FP constants to be built in integer registers. */
if (mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
return true;
@@ -388,7 +389,14 @@ (define_predicate "input_operand"
/* Check for valid MEM forms. */
if (GET_CODE (op) == MEM)
- return memory_address_p (mode, XEXP (op, 0));
+ {
+ /* Except when LRA is precisely working hard to make them valid
+ and relying entirely on the constraints. */
+ if (lra_in_progress)
+ return true;
+
+ return memory_address_p (mode, XEXP (op, 0));
+ }
return false;
})
===================================================================
@@ -1911,9 +1911,8 @@ sparc_expand_move (machine_mode mode, rt
/* We are able to build any SF constant in integer registers
with at most 2 instructions. */
&& (mode == SFmode
- /* And any DF constant in integer registers. */
- || (mode == DFmode
- && ! can_create_pseudo_p ())))
+ /* And any DF constant in integer registers if needed. */
+ || (mode == DFmode && !can_create_pseudo_p ())))
return false;
operands[1] = force_const_mem (mode, operands[1]);