From patchwork Fri Dec 10 20:03:50 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Plyatov X-Patchwork-Id: 75133 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 5DB73B70A9 for ; Sat, 11 Dec 2010 07:04:33 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756875Ab0LJUEH (ORCPT ); Fri, 10 Dec 2010 15:04:07 -0500 Received: from mail-ey0-f171.google.com ([209.85.215.171]:53156 "EHLO mail-ey0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754814Ab0LJUEF (ORCPT ); Fri, 10 Dec 2010 15:04:05 -0500 Received: by eyg5 with SMTP id 5so3043687eyg.2 for ; Fri, 10 Dec 2010 12:04:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:subject:date :message-id:x-mailer; bh=dLRXFO3QBgOEqhUGMz7oFdezcR8D99csuuWF5CXLa74=; b=CgGTzhM/EFQA4WoMn/s8OLJYjPY6LZVosgSGbPbNr2b8c4VK7CXnj82QV7SryoJtuJ tGhb5cCLUeygkun0+jUhxCEtmVxNDWooVqBcHg1mUIdaGppiCbOszHoaOVO5OAF0COUW yn1vW2YzO+uKOPHGcaWLi/4tLK9XufhetEBGY= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer; b=aPKTY3CtTYtoVSlKvCg4tftc7dSsR/GW83ycNhcQK15Qtzog7Xzp1QmceBkVsZnVAL ILrA86XYRBUvEtnTGMcUJca68N4FvqrE/WbPCwN1Sbk6C/DEwhc4lGYieiyykWTj2jI7 NXZN67+smyD5bQm94Zk3ozz+nUr1uXsgbe98U= Received: by 10.213.19.84 with SMTP id z20mr1648655eba.80.1292011443931; Fri, 10 Dec 2010 12:04:03 -0800 (PST) Received: from localhost.localdomain ([109.165.110.21]) by mx.google.com with ESMTPS id x54sm2586236eeh.11.2010.12.10.12.04.01 (version=TLSv1/SSLv3 cipher=RC4-MD5); Fri, 10 Dec 2010 12:04:02 -0800 (PST) From: Igor Plyatov To: jgarzik@pobox.com Cc: linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, geomatsi@gmail.com, Igor Plyatov Subject: [PATCH] ata: pata_at91.c bugfix for high master clock Date: Fri, 10 Dec 2010 23:03:50 +0300 Message-Id: <1292011430-20835-1-git-send-email-plyatov@gmail.com> X-Mailer: git-send-email 1.7.0.4 Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org The AT91SAM9 microcontrollers with master clock higher then 105 MHz and PIO0, have overflow of the NCS_RD_PULSE value in the MSB. This lead to "NCS_RD_PULSE" pulse longer then "NRD_CYCLE" pulse and pata_at91 driver does detect ATA device. Signed-off-by: Igor Plyatov --- drivers/ata/pata_at91.c | 11 +++++++++-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c index 0da0dcc..2e189be 100644 --- a/drivers/ata/pata_at91.c +++ b/drivers/ata/pata_at91.c @@ -33,12 +33,14 @@ #define DRV_NAME "pata_at91" -#define DRV_VERSION "0.1" +#define DRV_VERSION "0.2" #define CF_IDE_OFFSET 0x00c00000 #define CF_ALT_IDE_OFFSET 0x00e00000 #define CF_IDE_RES_SIZE 0x08 +#define NCS_RD_PULSE_LIMIT 0x3f /* maximal value for pulse bitfields */ + struct at91_ide_info { unsigned long mode; unsigned int cs; @@ -50,7 +52,7 @@ struct at91_ide_info { }; static const struct ata_timing initial_timing = - {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0}; + {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0}; static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz) { @@ -109,6 +111,11 @@ static void set_smc_timing(struct device *dev, /* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */ ncs_read_setup = 1; ncs_read_pulse = read_cycle - 2; + if (ncs_read_pulse > NCS_RD_PULSE_LIMIT) { + ncs_read_pulse = NCS_RD_PULSE_LIMIT; + dev_dbg(dev, "ncs_read_pulse limited to maximal value %lu\n", + ncs_read_pulse); + } /* Write timings same as read timings */ write_cycle = read_cycle;