diff mbox

mtd: spi-nor: enable stateless 4b op codes for mx25u25635f

Message ID 1492068234-9509-1-git-send-email-dev@kresin.me
State Accepted
Commit b0fcb4b413028376894feaaaf62bcb09ab1b52f2
Delegated to: Cyrille Pitchen
Headers show

Commit Message

Mathias Kresin April 13, 2017, 7:23 a.m. UTC
All required stateless 4-byte op codes are supported by this flash
chip. The stateless 4-byte support can't be autodetected due to a
missing 4-byte Address Instruction Table in SFDP.

Fixes hangs on reboot for SoCs expecting the flash chip in 3byte mode.

Signed-off-by: Mathias Kresin <dev@kresin.me>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Marek Vasut April 14, 2017, 2:06 p.m. UTC | #1
On 04/13/2017 09:23 AM, Mathias Kresin wrote:
> All required stateless 4-byte op codes are supported by this flash
> chip. The stateless 4-byte support can't be autodetected due to a
> missing 4-byte Address Instruction Table in SFDP.
> 
> Fixes hangs on reboot for SoCs expecting the flash chip in 3byte mode.

Acked-by: Marek Vasut <marek.vasut@gmail.com>

Thanks!

> Signed-off-by: Mathias Kresin <dev@kresin.me>
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 1ae872b..4b496d8 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1017,7 +1017,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>  	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
> -	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) },
> +	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
>  	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
>  	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
>  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
>
Cyrille Pitchen April 16, 2017, 4:40 p.m. UTC | #2
Le 14/04/2017 à 16:06, Marek Vasut a écrit :
> On 04/13/2017 09:23 AM, Mathias Kresin wrote:
>> All required stateless 4-byte op codes are supported by this flash
>> chip. The stateless 4-byte support can't be autodetected due to a
>> missing 4-byte Address Instruction Table in SFDP.
>>
>> Fixes hangs on reboot for SoCs expecting the flash chip in 3byte mode.
> 
> Acked-by: Marek Vasut <marek.vasut@gmail.com>
> 
> Thanks!

Applied to github/spi-nor

Thanks!
> 
>> Signed-off-by: Mathias Kresin <dev@kresin.me>
>> ---
>>  drivers/mtd/spi-nor/spi-nor.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
>> index 1ae872b..4b496d8 100644
>> --- a/drivers/mtd/spi-nor/spi-nor.c
>> +++ b/drivers/mtd/spi-nor/spi-nor.c
>> @@ -1017,7 +1017,7 @@ static const struct flash_info spi_nor_ids[] = {
>>  	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
>>  	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
>>  	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
>> -	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) },
>> +	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
>>  	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
>>  	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
>>  	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
>>
> 
>
diff mbox

Patch

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 1ae872b..4b496d8 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1017,7 +1017,7 @@  static const struct flash_info spi_nor_ids[] = {
 	{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
 	{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
 	{ "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, 0) },
-	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K) },
+	{ "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_4B_OPCODES) },
 	{ "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, 0) },
 	{ "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SPI_NOR_QUAD_READ) },
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },