diff mbox

[v5] S/390: Optimize atomic_compare_exchange and atomic_compare builtins.

Message ID 20170411142054.GA12607@linux.vnet.ibm.com
State New
Headers show

Commit Message

Dominik Vogt April 11, 2017, 2:20 p.m. UTC 
On Mon, Mar 27, 2017 at 09:27:35PM +0100, Dominik Vogt wrote:
> The attached patch optimizes the atomic_exchange and
> atomic_compare patterns on s390 and s390x (mostly limited to
> SImode and DImode).  Among general optimizaation, the changes fix
> most of the problems reported in PR 80080:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80080
> 
> Bootstrapped and regression tested on a zEC12 with s390 and s390x
> biarch.

v5:
  * Generate LT pattern directly for const 0 value.
  * Split into three patches.

Bootstrapped and regression tested on a zEC12 with s390 and s390x
biarch.

Ciao

Dominik ^_^  ^_^

Comments

Andreas Krebbel April 25, 2017, 7:46 a.m. UTC | #1 
On 04/11/2017 04:20 PM, Dominik Vogt wrote:
> On Mon, Mar 27, 2017 at 09:27:35PM +0100, Dominik Vogt wrote:
>> The attached patch optimizes the atomic_exchange and
>> atomic_compare patterns on s390 and s390x (mostly limited to
>> SImode and DImode).  Among general optimizaation, the changes fix
>> most of the problems reported in PR 80080:
>> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80080
>>
>> Bootstrapped and regression tested on a zEC12 with s390 and s390x
>> biarch.
> 
> v5:
>   * Generate LT pattern directly for const 0 value.
>   * Split into three patches.
> 
> Bootstrapped and regression tested on a zEC12 with s390 and s390x
> biarch.

Applied to mainline. Thanks!

-Andreas-
diff mbox

Patch

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 59f189c..6a1cab6 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -6518,13 +6518,30 @@ 
   [(parallel
     [(set (match_operand:SI 0 "register_operand" "")
 	  (match_operator:SI 1 "s390_eqne_operator"
-           [(match_operand:CCZ1 2 "register_operand")
+           [(match_operand 2 "cc_reg_operand")
 	    (match_operand 3 "const0_operand")]))
      (clobber (reg:CC CC_REGNUM))])]
   ""
-  "emit_insn (gen_sne (operands[0], operands[2]));
-   if (GET_CODE (operands[1]) == EQ)
-     emit_insn (gen_xorsi3 (operands[0], operands[0], const1_rtx));
+  "machine_mode mode = GET_MODE (operands[2]);
+   if (TARGET_Z196)
+     {
+       rtx cond, ite;
+
+       if (GET_CODE (operands[1]) == NE)
+	 cond = gen_rtx_NE (VOIDmode, operands[2], const0_rtx);
+       else
+	 cond = gen_rtx_EQ (VOIDmode, operands[2], const0_rtx);
+       ite = gen_rtx_IF_THEN_ELSE (SImode, cond, const1_rtx, const0_rtx);
+       emit_insn (gen_rtx_SET (operands[0], ite));
+     }
+   else
+     {
+       if (mode != CCZ1mode)
+	 FAIL;
+       emit_insn (gen_sne (operands[0], operands[2]));
+       if (GET_CODE (operands[1]) == EQ)
+	 emit_insn (gen_xorsi3 (operands[0], operands[0], const1_rtx));
+     }
    DONE;")
 
 (define_insn_and_split "sne"