From patchwork Wed Dec 8 17:11:36 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcelo Tosatti X-Patchwork-Id: 74888 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 99307B6EF2 for ; Fri, 10 Dec 2010 00:36:04 +1100 (EST) Received: from localhost ([127.0.0.1]:33307 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PQgfA-0000we-Te for incoming@patchwork.ozlabs.org; Thu, 09 Dec 2010 08:36:01 -0500 Received: from [140.186.70.92] (port=47014 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PQNYo-0002lx-NU for qemu-devel@nongnu.org; Wed, 08 Dec 2010 12:12:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PQNYl-0000fS-O3 for qemu-devel@nongnu.org; Wed, 08 Dec 2010 12:12:10 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50814) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PQNYl-0000eZ-Dr for qemu-devel@nongnu.org; Wed, 08 Dec 2010 12:12:07 -0500 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id oB8HC44A031577 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 8 Dec 2010 12:12:05 -0500 Received: from ns3.rdu.redhat.com (ns3.rdu.redhat.com [10.11.255.199]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id oB8HC4fO005769; Wed, 8 Dec 2010 12:12:04 -0500 Received: from amt.cnet (vpn1-4-93.ams2.redhat.com [10.36.4.93]) by ns3.rdu.redhat.com (8.13.8/8.13.8) with ESMTP id oB8HC2gD020001; Wed, 8 Dec 2010 12:12:03 -0500 Received: from amt.cnet (localhost.localdomain [127.0.0.1]) by amt.cnet (Postfix) with ESMTP id 5521365613D; Wed, 8 Dec 2010 15:11:37 -0200 (BRST) Received: (from marcelo@localhost) by amt.cnet (8.14.4/8.14.4/Submit) id oB8HBael010244; Wed, 8 Dec 2010 15:11:36 -0200 Date: Wed, 8 Dec 2010 15:11:36 -0200 From: Marcelo Tosatti To: qemu-devel@nongnu.org Message-ID: <20101208171136.GA10213@amt.cnet> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-08-17) X-Scanned-By: MIMEDefang 2.68 on 10.5.11.22 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. Cc: Gerd Hoffmann , Gleb Natapov Subject: [Qemu-devel] acpi_piix4: expose no_hotplug attribute via i/o port X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org On top of "add hotplug opt-out option for devices" patchset http://www.mail-archive.com/qemu-devel@nongnu.org/msg46953.html. Signed-off-by: Marcelo Tosatti diff --git a/hw/acpi_piix4.c b/hw/acpi_piix4.c index 1990424..4d099e3 100644 --- a/hw/acpi_piix4.c +++ b/hw/acpi_piix4.c @@ -38,6 +38,7 @@ #define PROC_BASE 0xaf00 #define PCI_BASE 0xae00 #define PCI_EJ_BASE 0xae08 +#define PCI_RMV_BASE 0xae0c #define PIIX4_CPU_HOTPLUG_STATUS 4 #define PIIX4_PCI_HOTPLUG_STATUS 2 @@ -76,6 +77,7 @@ typedef struct PIIX4PMState { /* for pci hotplug */ struct gpe_regs gpe; struct pci_status pci0_status; + uint32_t pci0_hotplug_enable; } PIIX4PMState; static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s); @@ -326,6 +328,25 @@ static const VMStateDescription vmstate_acpi = { } }; +static void piix4_update_hotplug(PIIX4PMState *s) +{ + PCIDevice *dev = &s->dev; + BusState *bus = qdev_get_parent_bus(&dev->qdev); + DeviceState *qdev, *next; + + s->pci0_hotplug_enable = 0; + + QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) { + PCIDeviceInfo *info = container_of(qdev->info, PCIDeviceInfo, qdev); + PCIDevice *pdev = DO_UPCAST(PCIDevice, qdev, qdev); + int slot = PCI_SLOT(pdev->devfn); + + if (!info->no_hotplug) { + s->pci0_hotplug_enable |= (1 << slot); + } + } +} + static void piix4_reset(void *opaque) { PIIX4PMState *s = opaque; @@ -340,6 +361,7 @@ static void piix4_reset(void *opaque) /* Mark SMM as already inited (until KVM supports SMM). */ pci_conf[0x5B] = 0x02; } + piix4_update_hotplug(s); } static void piix4_powerdown(void *opaque, int irq, int power_failing) @@ -594,6 +618,18 @@ static void pciej_write(void *opaque, uint32_t addr, uint32_t val) PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val); } +static uint32_t pcirmv_read(void *opaque, uint32_t addr) +{ + PIIX4PMState *s = opaque; + + return s->pci0_hotplug_enable; +} + +static void pcirmv_write(void *opaque, uint32_t addr, uint32_t val) +{ + return; +} + extern const char *global_cpu_model; static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, @@ -621,6 +657,9 @@ static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus); register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, bus); + register_ioport_write(PCI_RMV_BASE, 4, 4, pcirmv_write, s); + register_ioport_read(PCI_RMV_BASE, 4, 4, pcirmv_read, s); + pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); }